Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 062cf64a authored by Michael Adisumarta's avatar Michael Adisumarta
Browse files

ARM: dts: msm: add ipa to sdxpoorwills 



Add new dtsi entries for IPAv4.0.

Change-Id: Ic4cdbdd8f334857ec7dfb676a6eeeb085fd04cb4
CRs-Fixed: 2153400
Signed-off-by: default avatarMichael Adisumarta <madisuma@codeaurora.org>
parent d91ef6f6

arch/arm/boot/dts/qcom/sdxpoorwills-rumi.dts

+4 −0
Original line number Original line Diff line number Diff line
@@ -61,6 +61,10 @@ 
	compatible = "regulator-fixed";

	compatible = "regulator-fixed";

};

};





&ipa_hw {

	qcom,ipa-hw-mode = <1>; /* IPA hw type = Virtual */

};



&usb {

&usb {

	/delete-property/ qcom,usb-dbm;

	/delete-property/ qcom,usb-dbm;

	qcom,charging-disabled;

	qcom,charging-disabled;

arch/arm/boot/dts/qcom/sdxpoorwills-smp2p.dtsi

+23 −0
Original line number Original line Diff line number Diff line
@@ -105,5 +105,28 @@ 
		interrupt-controller;

		interrupt-controller;

		#interrupt-cells = <2>;

		#interrupt-cells = <2>;

	};

	};



	/* ipa - outbound entry to mss */

	smp2pgpio_ipa_1_out: qcom,smp2pgpio-ipa-1-out {

		compatible = "qcom,smp2pgpio";

		qcom,entry-name = "ipa";

		qcom,remote-pid = <1>;

		gpio-controller;

		#gpio-cells = <2>;

		interrupt-controller;

		#interrupt-cells = <2>;

	};



	/* ipa - inbound entry from mss */

	smp2pgpio_ipa_1_in: qcom,smp2pgpio-ipa-1-in {

		compatible = "qcom,smp2pgpio";

		qcom,entry-name = "ipa";

		qcom,remote-pid = <1>;

		qcom,is-inbound;

		gpio-controller;

		#gpio-cells = <2>;

		interrupt-controller;

		#interrupt-cells = <2>;

	};

};

};

arch/arm/boot/dts/qcom/sdxpoorwills.dtsi

+166 −0
Original line number Original line Diff line number Diff line
@@ -484,11 +484,177 @@ 
		reg = <0xc37000c 8>;

		reg = <0xc37000c 8>;

	};

	};





	qcom,msm_gsi {

		compatible = "qcom,msm_gsi";

	};



	qcom,rmnet-ipa {

		compatible = "qcom,rmnet-ipa3";

		qcom,rmnet-ipa-ssr;

		qcom,ipa-loaduC;

		qcom,ipa-advertise-sg-support;

	};



	system_pm {

	system_pm {

		compatible = "qcom,system-pm";

		compatible = "qcom,system-pm";

		mboxes = <&apps_rsc 0>;

		mboxes = <&apps_rsc 0>;

	};

	};





	ipa_hw: qcom,ipa@01e00000 {

		compatible = "qcom,ipa";

		reg = <0x1e00000 0x34000>,

		      <0x1e04000 0x28000>;

		reg-names = "ipa-base", "gsi-base";

		interrupts =

			<0 241 0>,

			<0 47 0>;

		interrupt-names = "ipa-irq", "gsi-irq";

		qcom,ipa-hw-ver = <14>; /* IPA core version = IPAv4.0 */

		qcom,ipa-hw-mode = <0>;

		qcom,ee = <0>;

		qcom,use-ipa-tethering-bridge;

		qcom,modem-cfg-emb-pipe-flt;

		qcom,use-ipa-pm;

		qcom,bandwidth-vote-for-ipa;

		qcom,msm-bus,name = "ipa";

		qcom,msm-bus,num-cases = <5>;

		qcom,msm-bus,num-paths = <4>;

		qcom,msm-bus,vectors-KBps =

		/* No vote */

			<90 512 0 0>,

			<90 585 0 0>,

			<1 676 0 0>,

			<143 777 0 0>,

		/* SVS2 */

			<90 512 3616000 7232000>,

			<90 585 300000 600000>,

			<1 676 90000 180000>, /*gcc_config_noc_clk_src */

			<143 777 0 120>, /* IB defined for IPA2X_clk in MHz*/

		/* SVS */

			<90 512 6640000 13280000>,

			<90 585 400000 800000>,

			<1 676 100000 200000>,

			<143 777 0 250>, /* IB defined for IPA2X_clk in MHz*/

		/* NOMINAL */

			<90 512 10400000 20800000>,

			<90 585 800000 1600000>,

			<1 676 200000 400000>,

			<143 777 0 440>, /* IB defined for IPA2X_clk in MHz*/

		/* TURBO */

			<90 512 10400000 20800000>,

			<90 585 960000 1920000>,

			<1 676 266000 532000>,

			<143 777 0 500>; /* IB defined for IPA clk in MHz*/

		qcom,bus-vector-names = "MIN", "SVS2", "SVS", "NOMINAL",

		"TURBO";

		qcom,throughput-threshold = <310 600 1000>;

		qcom,scaling-exceptions = <>;





		/* IPA RAM mmap */

		qcom,ipa-ram-mmap = <

			0x280	/* ofst_start; */

			0x0	/* nat_ofst; */

			0x0	/* nat_size; */

			0x288	/* v4_flt_hash_ofst; */

			0x78	/* v4_flt_hash_size; */

			0x4000	/* v4_flt_hash_size_ddr; */

			0x308	/* v4_flt_nhash_ofst; */

			0x78	/* v4_flt_nhash_size; */

			0x4000	/* v4_flt_nhash_size_ddr; */

			0x388	/* v6_flt_hash_ofst; */

			0x78	/* v6_flt_hash_size; */

			0x4000	/* v6_flt_hash_size_ddr; */

			0x408	/* v6_flt_nhash_ofst; */

			0x78	/* v6_flt_nhash_size; */

			0x4000	/* v6_flt_nhash_size_ddr; */

			0xf	/* v4_rt_num_index; */

			0x0	/* v4_modem_rt_index_lo; */

			0x7	/* v4_modem_rt_index_hi; */

			0x8	/* v4_apps_rt_index_lo; */

			0xe	/* v4_apps_rt_index_hi; */

			0x488	/* v4_rt_hash_ofst; */

			0x78	/* v4_rt_hash_size; */

			0x4000	/* v4_rt_hash_size_ddr; */

			0x508	/* v4_rt_nhash_ofst; */

			0x78	/* v4_rt_nhash_size; */

			0x4000	/* v4_rt_nhash_size_ddr; */

			0xf	/* v6_rt_num_index; */

			0x0	/* v6_modem_rt_index_lo; */

			0x7	/* v6_modem_rt_index_hi; */

			0x8	/* v6_apps_rt_index_lo; */

			0xe	/* v6_apps_rt_index_hi; */

			0x588	/* v6_rt_hash_ofst; */

			0x78	/* v6_rt_hash_size; */

			0x4000	/* v6_rt_hash_size_ddr; */

			0x608	/* v6_rt_nhash_ofst; */

			0x78	/* v6_rt_nhash_size; */

			0x4000	/* v6_rt_nhash_size_ddr; */

			0x688	/* modem_hdr_ofst; */

			0x140	/* modem_hdr_size; */

			0x7c8	/* apps_hdr_ofst; */

			0x0	/* apps_hdr_size; */

			0x800	/* apps_hdr_size_ddr; */

			0x7d0	/* modem_hdr_proc_ctx_ofst; */

			0x200	/* modem_hdr_proc_ctx_size; */

			0x9d0	/* apps_hdr_proc_ctx_ofst; */

			0x200	/* apps_hdr_proc_ctx_size; */

			0x0	/* apps_hdr_proc_ctx_size_ddr; */

			0x0	/* modem_comp_decomp_ofst; diff */

			0x0	/* modem_comp_decomp_size; diff */

			0x13f0	/* modem_ofst; */

			0x100c	/* modem_size; */

			0x23fc	/* apps_v4_flt_hash_ofst; */

			0x0	/* apps_v4_flt_hash_size; */

			0x23fc	/* apps_v4_flt_nhash_ofst; */

			0x0	/* apps_v4_flt_nhash_size; */

			0x23fc	/* apps_v6_flt_hash_ofst; */

			0x0	/* apps_v6_flt_hash_size; */

			0x23fc	/* apps_v6_flt_nhash_ofst; */

			0x0	/* apps_v6_flt_nhash_size; */

			0x80	/* uc_info_ofst; */

			0x200	/* uc_info_size; */

			0x2800	/* end_ofst; */

			0x23fc	/* apps_v4_rt_hash_ofst; */

			0x0	/* apps_v4_rt_hash_size; */

			0x23fc	/* apps_v4_rt_nhash_ofst; */

			0x0	/* apps_v4_rt_nhash_size; */

			0x23fc	/* apps_v6_rt_hash_ofst; */

			0x0	/* apps_v6_rt_hash_size; */

			0x23fc	/* apps_v6_rt_nhash_ofst; */

			0x0	/* apps_v6_rt_nhash_size; */

			0x2400	/* uc_event_ring_ofst; */

			0x400	/* uc_event_ring_size;*/

			0xbd8	/* pdn_config_ofst; */

			0x50	/* pdn_config_size; */

			0xc30  /* stats_quota_ofst */

			0x60   /* stats_quota_size */

			0xc90  /* stats_tethering_ofst */

			0x140  /* stats_tethering_size */

			0xdd0  /* stats_flt_v4_ofst */

			0x180  /* stats_flt_v4_size */

			0xf50  /* stats_flt_v6_ofst */

			0x180  /* stats_flt_v6_size */

			0x10d0 /* stats_rt_v4_ofst */

			0x180  /* stats_rt_v4_size */

			0x1250 /* stats_rt_v6_ofst */

			0x180  /* stats_rt_v6_size */

			0x13d0 /* stats_drop_ofst */

			0x20  /* stats_drop_size */

		>;



		/* smp2p gpio information */

		qcom,smp2pgpio_map_ipa_1_out {

			compatible = "qcom,smp2pgpio-map-ipa-1-out";

			gpios = <&smp2pgpio_ipa_1_out 0 0>;

		};



		qcom,smp2pgpio_map_ipa_1_in {

			compatible = "qcom,smp2pgpio-map-ipa-1-in";

			gpios = <&smp2pgpio_ipa_1_in 0 0>;

		};

	};



	emac_hw: qcom,emac@00020000 {

	emac_hw: qcom,emac@00020000 {

		compatible = "qcom,emac-dwc-eqos";

		compatible = "qcom,emac-dwc-eqos";

		reg = <0x20000 0x10000>,

		reg = <0x20000 0x10000>,