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Commit 05faadcf authored by Takashi Iwai's avatar Takashi Iwai Committed by Linus Torvalds
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lis3: fix regression of HP DriveGuard with 8bit chip 



Commit 2a7fade7 ("hwmon: lis3: Power on corrections") caused a
regression on HP laptops with 8bit chip.  Writing CTRL2_BOOT_8B bit seems
clearing the BIOS setup, and no proper interrupt for DriveGuard will be
triggered any more.

Since the init code there is basically only for embedded devices, put a
pdata check so that the problematic initialization will be skipped for
hp_accel stuff.

Signed-off-by: default avatarTakashi Iwai <tiwai@suse.de>
Cc: Eric Piel <eric.piel@tremplin-utc.net>
Cc: Samu Onkalo <samu.p.onkalo@nokia.com>
Cc: <stable@kernel.org>
Signed-off-by: default avatarAndrew Morton <akpm@google.com>
Signed-off-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
parent 0f86267b

drivers/misc/lis3lv02d/lis3lv02d.c

+8 −6
Original line number Original line Diff line number Diff line
@@ -375,12 +375,14 @@ void lis3lv02d_poweron(struct lis3lv02d *lis3) 
	 *      both have been read. So the value read will always be correct.

	 *      both have been read. So the value read will always be correct.

	 * Set BOOT bit to refresh factory tuning values.

	 * Set BOOT bit to refresh factory tuning values.

	 */

	 */

	if (lis3->pdata) {

		lis3->read(lis3, CTRL_REG2, &reg);

		lis3->read(lis3, CTRL_REG2, &reg);

		if (lis3->whoami ==  WAI_12B)

		if (lis3->whoami ==  WAI_12B)

			reg |= CTRL2_BDU | CTRL2_BOOT;

			reg |= CTRL2_BDU | CTRL2_BOOT;

		else

		else

			reg |= CTRL2_BOOT_8B;

			reg |= CTRL2_BOOT_8B;

		lis3->write(lis3, CTRL_REG2, reg);

		lis3->write(lis3, CTRL_REG2, reg);

	}





	/* LIS3 power on delay is quite long */

	/* LIS3 power on delay is quite long */

	msleep(lis3->pwron_delay / lis3lv02d_get_odr());

	msleep(lis3->pwron_delay / lis3lv02d_get_odr());