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Commit 05c45ca9 authored by Russell King's avatar Russell King Committed by Russell King
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[MFD] Add code UCB1200/UCB1300 device support 



Add the core device support code for the Philips UCB1200 and
UCB1300 devices.  Also includes the following from Pavel:

This fixes u32 vs. pm_message_t confusion and uses cleaner
try_to_freeze() [fixing compilation as a side-effect on newer
kernels.]

Signed-off-by: default avatarPavel Machek <pavel@suse.cz>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 2f79f458

drivers/mfd/Kconfig

+5 −0
Original line number Original line Diff line number Diff line
@@ -13,4 +13,9 @@ config MCP_SA11X0 
	depends on ARCH_SA1100

	depends on ARCH_SA1100

	select MCP

	select MCP





# Chip drivers

config MCP_UCB1200

	tristate "Support for UCB1200 / UCB1300"

	depends on MCP



endmenu
 
endmenu

drivers/mfd/Makefile

+1 −0
Original line number Original line Diff line number Diff line
@@ -4,3 +4,4 @@ 




obj-$(CONFIG_MCP)		+= mcp-core.o

obj-$(CONFIG_MCP)		+= mcp-core.o

obj-$(CONFIG_MCP_SA11X0)	+= mcp-sa11x0.o

obj-$(CONFIG_MCP_SA11X0)	+= mcp-sa11x0.o

obj-$(CONFIG_MCP_UCB1200)	+= ucb1x00-core.o

drivers/mfd/ucb1x00-core.c

0 → 100644
+665 −0
Original line number Original line Diff line number Diff line 
/*

 *  linux/drivers/mfd/ucb1x00-core.c

 *

 *  Copyright (C) 2001 Russell King, All Rights Reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License as published by

 * the Free Software Foundation; either version 2 of the License.

 *

 *  The UCB1x00 core driver provides basic services for handling IO,

 *  the ADC, interrupts, and accessing registers.  It is designed

 *  such that everything goes through this layer, thereby providing

 *  a consistent locking methodology, as well as allowing the drivers

 *  to be used on other non-MCP-enabled hardware platforms.

 *

 *  Note that all locks are private to this file.  Nothing else may

 *  touch them.

 */

#include <linux/config.h>

#include <linux/module.h>

#include <linux/kernel.h>

#include <linux/slab.h>

#include <linux/init.h>

#include <linux/errno.h>

#include <linux/interrupt.h>

#include <linux/device.h>



#include <asm/dma.h>

#include <asm/hardware.h>

#include <asm/irq.h>



#include "ucb1x00.h"



static DECLARE_MUTEX(ucb1x00_sem);

static LIST_HEAD(ucb1x00_drivers);

static LIST_HEAD(ucb1x00_devices);



/**

 *	ucb1x00_io_set_dir - set IO direction

 *	@ucb: UCB1x00 structure describing chip

 *	@in:  bitfield of IO pins to be set as inputs

 *	@out: bitfield of IO pins to be set as outputs

 *

 *	Set the IO direction of the ten general purpose IO pins on

 *	the UCB1x00 chip.  The @in bitfield has priority over the

 *	@out bitfield, in that if you specify a pin as both input

 *	and output, it will end up as an input.

 *

 *	ucb1x00_enable must have been called to enable the comms

 *	before using this function.

 *

 *	This function takes a spinlock, disabling interrupts.

 */

void ucb1x00_io_set_dir(struct ucb1x00 *ucb, unsigned int in, unsigned int out)

{

	unsigned long flags;



	spin_lock_irqsave(&ucb->io_lock, flags);

	ucb->io_dir |= out;

	ucb->io_dir &= ~in;



	ucb1x00_reg_write(ucb, UCB_IO_DIR, ucb->io_dir);

	spin_unlock_irqrestore(&ucb->io_lock, flags);

}



/**

 *	ucb1x00_io_write - set or clear IO outputs

 *	@ucb:   UCB1x00 structure describing chip

 *	@set:   bitfield of IO pins to set to logic '1'

 *	@clear: bitfield of IO pins to set to logic '0'

 *

 *	Set the IO output state of the specified IO pins.  The value

 *	is retained if the pins are subsequently configured as inputs.

 *	The @clear bitfield has priority over the @set bitfield -

 *	outputs will be cleared.

 *

 *	ucb1x00_enable must have been called to enable the comms

 *	before using this function.

 *

 *	This function takes a spinlock, disabling interrupts.

 */

void ucb1x00_io_write(struct ucb1x00 *ucb, unsigned int set, unsigned int clear)

{

	unsigned long flags;



	spin_lock_irqsave(&ucb->io_lock, flags);

	ucb->io_out |= set;

	ucb->io_out &= ~clear;



	ucb1x00_reg_write(ucb, UCB_IO_DATA, ucb->io_out);

	spin_unlock_irqrestore(&ucb->io_lock, flags);

}



/**

 *	ucb1x00_io_read - read the current state of the IO pins

 *	@ucb: UCB1x00 structure describing chip

 *

 *	Return a bitfield describing the logic state of the ten

 *	general purpose IO pins.

 *

 *	ucb1x00_enable must have been called to enable the comms

 *	before using this function.

 *

 *	This function does not take any semaphores or spinlocks.

 */

unsigned int ucb1x00_io_read(struct ucb1x00 *ucb)

{

	return ucb1x00_reg_read(ucb, UCB_IO_DATA);

}



/*

 * UCB1300 data sheet says we must:

 *  1. enable ADC	=> 5us (including reference startup time)

 *  2. select input	=> 51*tsibclk  => 4.3us

 *  3. start conversion	=> 102*tsibclk => 8.5us

 * (tsibclk = 1/11981000)

 * Period between SIB 128-bit frames = 10.7us

 */



/**

 *	ucb1x00_adc_enable - enable the ADC converter

 *	@ucb: UCB1x00 structure describing chip

 *

 *	Enable the ucb1x00 and ADC converter on the UCB1x00 for use.

 *	Any code wishing to use the ADC converter must call this

 *	function prior to using it.

 *

 *	This function takes the ADC semaphore to prevent two or more

 *	concurrent uses, and therefore may sleep.  As a result, it

 *	can only be called from process context, not interrupt

 *	context.

 *

 *	You should release the ADC as soon as possible using

 *	ucb1x00_adc_disable.

 */

void ucb1x00_adc_enable(struct ucb1x00 *ucb)

{

	down(&ucb->adc_sem);



	ucb->adc_cr |= UCB_ADC_ENA;



	ucb1x00_enable(ucb);

	ucb1x00_reg_write(ucb, UCB_ADC_CR, ucb->adc_cr);

}



/**

 *	ucb1x00_adc_read - read the specified ADC channel

 *	@ucb: UCB1x00 structure describing chip

 *	@adc_channel: ADC channel mask

 *	@sync: wait for syncronisation pulse.

 *

 *	Start an ADC conversion and wait for the result.  Note that

 *	synchronised ADC conversions (via the ADCSYNC pin) must wait

 *	until the trigger is asserted and the conversion is finished.

 *

 *	This function currently spins waiting for the conversion to

 *	complete (2 frames max without sync).

 *

 *	If called for a synchronised ADC conversion, it may sleep

 *	with the ADC semaphore held.

 */

unsigned int ucb1x00_adc_read(struct ucb1x00 *ucb, int adc_channel, int sync)

{

	unsigned int val;



	if (sync)

		adc_channel |= UCB_ADC_SYNC_ENA;



	ucb1x00_reg_write(ucb, UCB_ADC_CR, ucb->adc_cr | adc_channel);

	ucb1x00_reg_write(ucb, UCB_ADC_CR, ucb->adc_cr | adc_channel | UCB_ADC_START);



	for (;;) {

		val = ucb1x00_reg_read(ucb, UCB_ADC_DATA);

		if (val & UCB_ADC_DAT_VAL)

			break;

		/* yield to other processes */

		set_current_state(TASK_INTERRUPTIBLE);

		schedule_timeout(1);

	}



	return UCB_ADC_DAT(val);

}



/**

 *	ucb1x00_adc_disable - disable the ADC converter

 *	@ucb: UCB1x00 structure describing chip

 *

 *	Disable the ADC converter and release the ADC semaphore.

 */

void ucb1x00_adc_disable(struct ucb1x00 *ucb)

{

	ucb->adc_cr &= ~UCB_ADC_ENA;

	ucb1x00_reg_write(ucb, UCB_ADC_CR, ucb->adc_cr);

	ucb1x00_disable(ucb);



	up(&ucb->adc_sem);

}



/*

 * UCB1x00 Interrupt handling.

 *

 * The UCB1x00 can generate interrupts when the SIBCLK is stopped.

 * Since we need to read an internal register, we must re-enable

 * SIBCLK to talk to the chip.  We leave the clock running until

 * we have finished processing all interrupts from the chip.

 */

static irqreturn_t ucb1x00_irq(int irqnr, void *devid, struct pt_regs *regs)

{

	struct ucb1x00 *ucb = devid;

	struct ucb1x00_irq *irq;

	unsigned int isr, i;



	ucb1x00_enable(ucb);

	isr = ucb1x00_reg_read(ucb, UCB_IE_STATUS);

	ucb1x00_reg_write(ucb, UCB_IE_CLEAR, isr);

	ucb1x00_reg_write(ucb, UCB_IE_CLEAR, 0);



	for (i = 0, irq = ucb->irq_handler; i < 16 && isr; i++, isr >>= 1, irq++)

		if (isr & 1 && irq->fn)

			irq->fn(i, irq->devid);

	ucb1x00_disable(ucb);



	return IRQ_HANDLED;

}



/**

 *	ucb1x00_hook_irq - hook a UCB1x00 interrupt

 *	@ucb:   UCB1x00 structure describing chip

 *	@idx:   interrupt index

 *	@fn:    function to call when interrupt is triggered

 *	@devid: device id to pass to interrupt handler

 *

 *	Hook the specified interrupt.  You can only register one handler

 *	for each interrupt source.  The interrupt source is not enabled

 *	by this function; use ucb1x00_enable_irq instead.

 *

 *	Interrupt handlers will be called with other interrupts enabled.

 *

 *	Returns zero on success, or one of the following errors:

 *	 -EINVAL if the interrupt index is invalid

 *	 -EBUSY if the interrupt has already been hooked

 */

int ucb1x00_hook_irq(struct ucb1x00 *ucb, unsigned int idx, void (*fn)(int, void *), void *devid)

{

	struct ucb1x00_irq *irq;

	int ret = -EINVAL;



	if (idx < 16) {

		irq = ucb->irq_handler + idx;

		ret = -EBUSY;



		spin_lock_irq(&ucb->lock);

		if (irq->fn == NULL) {

			irq->devid = devid;

			irq->fn = fn;

			ret = 0;

		}

		spin_unlock_irq(&ucb->lock);

	}

	return ret;

}



/**

 *	ucb1x00_enable_irq - enable an UCB1x00 interrupt source

 *	@ucb: UCB1x00 structure describing chip

 *	@idx: interrupt index

 *	@edges: interrupt edges to enable

 *

 *	Enable the specified interrupt to trigger on %UCB_RISING,

 *	%UCB_FALLING or both edges.  The interrupt should have been

 *	hooked by ucb1x00_hook_irq.

 */

void ucb1x00_enable_irq(struct ucb1x00 *ucb, unsigned int idx, int edges)

{

	unsigned long flags;



	if (idx < 16) {

		spin_lock_irqsave(&ucb->lock, flags);



		ucb1x00_enable(ucb);

		if (edges & UCB_RISING) {

			ucb->irq_ris_enbl |= 1 << idx;

			ucb1x00_reg_write(ucb, UCB_IE_RIS, ucb->irq_ris_enbl);

		}

		if (edges & UCB_FALLING) {

			ucb->irq_fal_enbl |= 1 << idx;

			ucb1x00_reg_write(ucb, UCB_IE_FAL, ucb->irq_fal_enbl);

		}

		ucb1x00_disable(ucb);

		spin_unlock_irqrestore(&ucb->lock, flags);

	}

}



/**

 *	ucb1x00_disable_irq - disable an UCB1x00 interrupt source

 *	@ucb: UCB1x00 structure describing chip

 *	@edges: interrupt edges to disable

 *

 *	Disable the specified interrupt triggering on the specified

 *	(%UCB_RISING, %UCB_FALLING or both) edges.

 */

void ucb1x00_disable_irq(struct ucb1x00 *ucb, unsigned int idx, int edges)

{

	unsigned long flags;



	if (idx < 16) {

		spin_lock_irqsave(&ucb->lock, flags);



		ucb1x00_enable(ucb);

		if (edges & UCB_RISING) {

			ucb->irq_ris_enbl &= ~(1 << idx);

			ucb1x00_reg_write(ucb, UCB_IE_RIS, ucb->irq_ris_enbl);

		}

		if (edges & UCB_FALLING) {

			ucb->irq_fal_enbl &= ~(1 << idx);

			ucb1x00_reg_write(ucb, UCB_IE_FAL, ucb->irq_fal_enbl);

		}

		ucb1x00_disable(ucb);

		spin_unlock_irqrestore(&ucb->lock, flags);

	}

}



/**

 *	ucb1x00_free_irq - disable and free the specified UCB1x00 interrupt

 *	@ucb: UCB1x00 structure describing chip

 *	@idx: interrupt index

 *	@devid: device id.

 *

 *	Disable the interrupt source and remove the handler.  devid must

 *	match the devid passed when hooking the interrupt.

 *

 *	Returns zero on success, or one of the following errors:

 *	 -EINVAL if the interrupt index is invalid

 *	 -ENOENT if devid does not match

 */

int ucb1x00_free_irq(struct ucb1x00 *ucb, unsigned int idx, void *devid)

{

	struct ucb1x00_irq *irq;

	int ret;



	if (idx >= 16)

		goto bad;



	irq = ucb->irq_handler + idx;

	ret = -ENOENT;



	spin_lock_irq(&ucb->lock);

	if (irq->devid == devid) {

		ucb->irq_ris_enbl &= ~(1 << idx);

		ucb->irq_fal_enbl &= ~(1 << idx);



		ucb1x00_enable(ucb);

		ucb1x00_reg_write(ucb, UCB_IE_RIS, ucb->irq_ris_enbl);

		ucb1x00_reg_write(ucb, UCB_IE_FAL, ucb->irq_fal_enbl);

		ucb1x00_disable(ucb);



		irq->fn = NULL;

		irq->devid = NULL;

		ret = 0;

	}

	spin_unlock_irq(&ucb->lock);

	return ret;



bad:

	printk(KERN_ERR "Freeing bad UCB1x00 irq %d\n", idx);

	return -EINVAL;

}



static int ucb1x00_add_dev(struct ucb1x00 *ucb, struct ucb1x00_driver *drv)

{

	struct ucb1x00_dev *dev;

	int ret = -ENOMEM;



	dev = kmalloc(sizeof(struct ucb1x00_dev), GFP_KERNEL);

	if (dev) {

		dev->ucb = ucb;

		dev->drv = drv;



		ret = drv->add(dev);



		if (ret == 0) {

			list_add(&dev->dev_node, &ucb->devs);

			list_add(&dev->drv_node, &drv->devs);

		} else {

			kfree(dev);

		}

	}

	return ret;

}



static void ucb1x00_remove_dev(struct ucb1x00_dev *dev)

{

	dev->drv->remove(dev);

	list_del(&dev->dev_node);

	list_del(&dev->drv_node);

	kfree(dev);

}



/*

 * Try to probe our interrupt, rather than relying on lots of

 * hard-coded machine dependencies.  For reference, the expected

 * IRQ mappings are:

 *

 *  	Machine		Default IRQ

 *	adsbitsy	IRQ_GPCIN4

 *	cerf		IRQ_GPIO_UCB1200_IRQ

 *	flexanet	IRQ_GPIO_GUI

 *	freebird	IRQ_GPIO_FREEBIRD_UCB1300_IRQ

 *	graphicsclient	ADS_EXT_IRQ(8)

 *	graphicsmaster	ADS_EXT_IRQ(8)

 *	lart		LART_IRQ_UCB1200

 *	omnimeter	IRQ_GPIO23

 *	pfs168		IRQ_GPIO_UCB1300_IRQ

 *	simpad		IRQ_GPIO_UCB1300_IRQ

 *	shannon		SHANNON_IRQ_GPIO_IRQ_CODEC

 *	yopy		IRQ_GPIO_UCB1200_IRQ

 */

static int ucb1x00_detect_irq(struct ucb1x00 *ucb)

{

	unsigned long mask;



	mask = probe_irq_on();

	if (!mask)

		return NO_IRQ;



	/*

	 * Enable the ADC interrupt.

	 */

	ucb1x00_reg_write(ucb, UCB_IE_RIS, UCB_IE_ADC);

	ucb1x00_reg_write(ucb, UCB_IE_FAL, UCB_IE_ADC);

	ucb1x00_reg_write(ucb, UCB_IE_CLEAR, 0xffff);

	ucb1x00_reg_write(ucb, UCB_IE_CLEAR, 0);



	/*

	 * Cause an ADC interrupt.

	 */

	ucb1x00_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA);

	ucb1x00_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA | UCB_ADC_START);



	/*

	 * Wait for the conversion to complete.

	 */

	while ((ucb1x00_reg_read(ucb, UCB_ADC_DATA) & UCB_ADC_DAT_VAL) == 0);

	ucb1x00_reg_write(ucb, UCB_ADC_CR, 0);



	/*

	 * Disable and clear interrupt.

	 */

	ucb1x00_reg_write(ucb, UCB_IE_RIS, 0);

	ucb1x00_reg_write(ucb, UCB_IE_FAL, 0);

	ucb1x00_reg_write(ucb, UCB_IE_CLEAR, 0xffff);

	ucb1x00_reg_write(ucb, UCB_IE_CLEAR, 0);



	/*

	 * Read triggered interrupt.

	 */

	return probe_irq_off(mask);

}



static int ucb1x00_probe(struct mcp *mcp)

{

	struct ucb1x00 *ucb;

	struct ucb1x00_driver *drv;

	unsigned int id;

	int ret = -ENODEV;



	mcp_enable(mcp);

	id = mcp_reg_read(mcp, UCB_ID);



	if (id != UCB_ID_1200 && id != UCB_ID_1300) {

		printk(KERN_WARNING "UCB1x00 ID not found: %04x\n", id);

		goto err_disable;

	}



	ucb = kmalloc(sizeof(struct ucb1x00), GFP_KERNEL);

	ret = -ENOMEM;

	if (!ucb)

		goto err_disable;



	memset(ucb, 0, sizeof(struct ucb1x00));



	ucb->cdev.class = &ucb1x00_class;

	ucb->cdev.dev = &mcp->attached_device;

	strlcpy(ucb->cdev.class_id, "ucb1x00", sizeof(ucb->cdev.class_id));



	spin_lock_init(&ucb->lock);

	spin_lock_init(&ucb->io_lock);

	sema_init(&ucb->adc_sem, 1);



	ucb->id  = id;

	ucb->mcp = mcp;

	ucb->irq = ucb1x00_detect_irq(ucb);

	if (ucb->irq == NO_IRQ) {

		printk(KERN_ERR "UCB1x00: IRQ probe failed\n");

		ret = -ENODEV;

		goto err_free;

	}



	ret = request_irq(ucb->irq, ucb1x00_irq, 0, "UCB1x00", ucb);

	if (ret) {

		printk(KERN_ERR "ucb1x00: unable to grab irq%d: %d\n",

			ucb->irq, ret);

		goto err_free;

	}



	set_irq_type(ucb->irq, IRQT_RISING);

	mcp_set_drvdata(mcp, ucb);



	ret = class_device_register(&ucb->cdev);

	if (ret)

		goto err_irq;



	INIT_LIST_HEAD(&ucb->devs);

	down(&ucb1x00_sem);

	list_add(&ucb->node, &ucb1x00_devices);

	list_for_each_entry(drv, &ucb1x00_drivers, node) {

		ucb1x00_add_dev(ucb, drv);

	}

	up(&ucb1x00_sem);

	goto out;



 err_irq:

	free_irq(ucb->irq, ucb);

 err_free:

	kfree(ucb);

 err_disable:

	mcp_disable(mcp);

 out:

	return ret;

}



static void ucb1x00_remove(struct mcp *mcp)

{

	struct ucb1x00 *ucb = mcp_get_drvdata(mcp);

	struct list_head *l, *n;



	down(&ucb1x00_sem);

	list_del(&ucb->node);

	list_for_each_safe(l, n, &ucb->devs) {

		struct ucb1x00_dev *dev = list_entry(l, struct ucb1x00_dev, dev_node);

		ucb1x00_remove_dev(dev);

	}

	up(&ucb1x00_sem);



	free_irq(ucb->irq, ucb);

	class_device_unregister(&ucb->cdev);

}



static void ucb1x00_release(struct class_device *dev)

{

	struct ucb1x00 *ucb = classdev_to_ucb1x00(dev);

	kfree(ucb);

}



static struct class ucb1x00_class = {

	.name		= "ucb1x00",

	.release	= ucb1x00_release,

};



int ucb1x00_register_driver(struct ucb1x00_driver *drv)

{

	struct ucb1x00 *ucb;



	INIT_LIST_HEAD(&drv->devs);

	down(&ucb1x00_sem);

	list_add(&drv->node, &ucb1x00_drivers);

	list_for_each_entry(ucb, &ucb1x00_devices, node) {

		ucb1x00_add_dev(ucb, drv);

	}

	up(&ucb1x00_sem);

	return 0;

}



void ucb1x00_unregister_driver(struct ucb1x00_driver *drv)

{

	struct list_head *n, *l;



	down(&ucb1x00_sem);

	list_del(&drv->node);

	list_for_each_safe(l, n, &drv->devs) {

		struct ucb1x00_dev *dev = list_entry(l, struct ucb1x00_dev, drv_node);

		ucb1x00_remove_dev(dev);

	}

	up(&ucb1x00_sem);

}



static int ucb1x00_suspend(struct mcp *mcp, pm_message_t state)

{

	struct ucb1x00 *ucb = mcp_get_drvdata(mcp);

	struct ucb1x00_dev *dev;



	down(&ucb1x00_sem);

	list_for_each_entry(dev, &ucb->devs, dev_node) {

		if (dev->drv->suspend)

			dev->drv->suspend(dev, state);

	}

	up(&ucb1x00_sem);

	return 0;

}



static int ucb1x00_resume(struct mcp *mcp)

{

	struct ucb1x00 *ucb = mcp_get_drvdata(mcp);

	struct ucb1x00_dev *dev;



	down(&ucb1x00_sem);

	list_for_each_entry(dev, &ucb->devs, dev_node) {

		if (dev->drv->resume)

			dev->drv->resume(dev);

	}

	up(&ucb1x00_sem);

	return 0;

}



static struct mcp_driver ucb1x00_driver = {

	.drv		= {

		.name	= "ucb1x00",

	},

	.probe		= ucb1x00_probe,

	.remove		= ucb1x00_remove,

	.suspend	= ucb1x00_suspend,

	.resume		= ucb1x00_resume,

};



static int __init ucb1x00_init(void)

{

	int ret = class_register(&ucb1x00_class);

	if (ret == 0) {

		ret = mcp_driver_register(&ucb1x00_driver);

		if (ret)

			class_unregister(&ucb1x00_class);

	}

	return ret;

}



static void __exit ucb1x00_exit(void)

{

	mcp_driver_unregister(&ucb1x00_driver);

	class_unregister(&ucb1x00_class);

}



module_init(ucb1x00_init);

module_exit(ucb1x00_exit);



EXPORT_SYMBOL(ucb1x00_class);



EXPORT_SYMBOL(ucb1x00_io_set_dir);

EXPORT_SYMBOL(ucb1x00_io_write);

EXPORT_SYMBOL(ucb1x00_io_read);



EXPORT_SYMBOL(ucb1x00_adc_enable);

EXPORT_SYMBOL(ucb1x00_adc_read);

EXPORT_SYMBOL(ucb1x00_adc_disable);



EXPORT_SYMBOL(ucb1x00_hook_irq);

EXPORT_SYMBOL(ucb1x00_free_irq);

EXPORT_SYMBOL(ucb1x00_enable_irq);

EXPORT_SYMBOL(ucb1x00_disable_irq);



EXPORT_SYMBOL(ucb1x00_register_driver);

EXPORT_SYMBOL(ucb1x00_unregister_driver);



MODULE_AUTHOR("Russell King <rmk@arm.linux.org.uk>");

MODULE_DESCRIPTION("UCB1x00 core driver");

MODULE_LICENSE("GPL");

drivers/mfd/ucb1x00.h

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/*

 *  linux/drivers/mfd/ucb1x00.h

 *

 *  Copyright (C) 2001 Russell King, All Rights Reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License as published by

 * the Free Software Foundation; either version 2 of the License.

 */

#ifndef UCB1200_H

#define UCB1200_H



#define UCB_IO_DATA	0x00

#define UCB_IO_DIR	0x01



#define UCB_IO_0		(1 << 0)

#define UCB_IO_1		(1 << 1)

#define UCB_IO_2		(1 << 2)

#define UCB_IO_3		(1 << 3)

#define UCB_IO_4		(1 << 4)

#define UCB_IO_5		(1 << 5)

#define UCB_IO_6		(1 << 6)

#define UCB_IO_7		(1 << 7)

#define UCB_IO_8		(1 << 8)

#define UCB_IO_9		(1 << 9)



#define UCB_IE_RIS	0x02

#define UCB_IE_FAL	0x03

#define UCB_IE_STATUS	0x04

#define UCB_IE_CLEAR	0x04

#define UCB_IE_ADC		(1 << 11)

#define UCB_IE_TSPX		(1 << 12)

#define UCB_IE_TSMX		(1 << 13)

#define UCB_IE_TCLIP		(1 << 14)

#define UCB_IE_ACLIP		(1 << 15)



#define UCB_IRQ_TSPX		12



#define UCB_TC_A	0x05

#define UCB_TC_A_LOOP		(1 << 7)	/* UCB1200 */

#define UCB_TC_A_AMPL		(1 << 7)	/* UCB1300 */



#define UCB_TC_B	0x06

#define UCB_TC_B_VOICE_ENA	(1 << 3)

#define UCB_TC_B_CLIP		(1 << 4)

#define UCB_TC_B_ATT		(1 << 6)

#define UCB_TC_B_SIDE_ENA	(1 << 11)

#define UCB_TC_B_MUTE		(1 << 13)

#define UCB_TC_B_IN_ENA		(1 << 14)

#define UCB_TC_B_OUT_ENA	(1 << 15)



#define UCB_AC_A	0x07

#define UCB_AC_B	0x08

#define UCB_AC_B_LOOP		(1 << 8)

#define UCB_AC_B_MUTE		(1 << 13)

#define UCB_AC_B_IN_ENA		(1 << 14)

#define UCB_AC_B_OUT_ENA	(1 << 15)



#define UCB_TS_CR	0x09

#define UCB_TS_CR_TSMX_POW	(1 << 0)

#define UCB_TS_CR_TSPX_POW	(1 << 1)

#define UCB_TS_CR_TSMY_POW	(1 << 2)

#define UCB_TS_CR_TSPY_POW	(1 << 3)

#define UCB_TS_CR_TSMX_GND	(1 << 4)

#define UCB_TS_CR_TSPX_GND	(1 << 5)

#define UCB_TS_CR_TSMY_GND	(1 << 6)

#define UCB_TS_CR_TSPY_GND	(1 << 7)

#define UCB_TS_CR_MODE_INT	(0 << 8)

#define UCB_TS_CR_MODE_PRES	(1 << 8)

#define UCB_TS_CR_MODE_POS	(2 << 8)

#define UCB_TS_CR_BIAS_ENA	(1 << 11)

#define UCB_TS_CR_TSPX_LOW	(1 << 12)

#define UCB_TS_CR_TSMX_LOW	(1 << 13)



#define UCB_ADC_CR	0x0a

#define UCB_ADC_SYNC_ENA	(1 << 0)

#define UCB_ADC_VREFBYP_CON	(1 << 1)

#define UCB_ADC_INP_TSPX	(0 << 2)

#define UCB_ADC_INP_TSMX	(1 << 2)

#define UCB_ADC_INP_TSPY	(2 << 2)

#define UCB_ADC_INP_TSMY	(3 << 2)

#define UCB_ADC_INP_AD0		(4 << 2)

#define UCB_ADC_INP_AD1		(5 << 2)

#define UCB_ADC_INP_AD2		(6 << 2)

#define UCB_ADC_INP_AD3		(7 << 2)

#define UCB_ADC_EXT_REF		(1 << 5)

#define UCB_ADC_START		(1 << 7)

#define UCB_ADC_ENA		(1 << 15)



#define UCB_ADC_DATA	0x0b

#define UCB_ADC_DAT_VAL		(1 << 15)

#define UCB_ADC_DAT(x)		(((x) & 0x7fe0) >> 5)



#define UCB_ID		0x0c

#define UCB_ID_1200		0x1004

#define UCB_ID_1300		0x1005



#define UCB_MODE	0x0d

#define UCB_MODE_DYN_VFLAG_ENA	(1 << 12)

#define UCB_MODE_AUD_OFF_CAN	(1 << 13)



#include "mcp.h"



struct ucb1x00_irq {

	void *devid;

	void (*fn)(int, void *);

};



extern struct class ucb1x00_class;



struct ucb1x00 {

	spinlock_t		lock;

	struct mcp		*mcp;

	unsigned int		irq;

	struct semaphore	adc_sem;

	spinlock_t		io_lock;

	u16			id;

	u16			io_dir;

	u16			io_out;

	u16			adc_cr;

	u16			irq_fal_enbl;

	u16			irq_ris_enbl;

	struct ucb1x00_irq	irq_handler[16];

	struct class_device	cdev;

	struct list_head	node;

	struct list_head	devs;

};



struct ucb1x00_driver;



struct ucb1x00_dev {

	struct list_head	dev_node;

	struct list_head	drv_node;

	struct ucb1x00		*ucb;

	struct ucb1x00_driver	*drv;

	void			*priv;

};



struct ucb1x00_driver {

	struct list_head	node;

	struct list_head	devs;

	int	(*add)(struct ucb1x00_dev *dev);

	void	(*remove)(struct ucb1x00_dev *dev);

	int	(*suspend)(struct ucb1x00_dev *dev, pm_message_t state);

	int	(*resume)(struct ucb1x00_dev *dev);

};



#define classdev_to_ucb1x00(cd)	container_of(cd, struct ucb1x00, cdev)



int ucb1x00_register_driver(struct ucb1x00_driver *);

void ucb1x00_unregister_driver(struct ucb1x00_driver *);



/**

 *	ucb1x00_clkrate - return the UCB1x00 SIB clock rate

 *	@ucb: UCB1x00 structure describing chip

 *

 *	Return the SIB clock rate in Hz.

 */

static inline unsigned int ucb1x00_clkrate(struct ucb1x00 *ucb)

{

	return mcp_get_sclk_rate(ucb->mcp);

}



/**

 *	ucb1x00_enable - enable the UCB1x00 SIB clock

 *	@ucb: UCB1x00 structure describing chip

 *

 *	Enable the SIB clock.  This can be called multiple times.

 */

static inline void ucb1x00_enable(struct ucb1x00 *ucb)

{

	mcp_enable(ucb->mcp);

}



/**

 *	ucb1x00_disable - disable the UCB1x00 SIB clock

 *	@ucb: UCB1x00 structure describing chip

 *

 *	Disable the SIB clock.  The SIB clock will only be disabled

 *	when the number of ucb1x00_enable calls match the number of

 *	ucb1x00_disable calls.

 */

static inline void ucb1x00_disable(struct ucb1x00 *ucb)

{

	mcp_disable(ucb->mcp);

}



/**

 *	ucb1x00_reg_write - write a UCB1x00 register

 *	@ucb: UCB1x00 structure describing chip

 *	@reg: UCB1x00 4-bit register index to write

 *	@val: UCB1x00 16-bit value to write

 *

 *	Write the UCB1x00 register @reg with value @val.  The SIB

 *	clock must be running for this function to return.

 */

static inline void ucb1x00_reg_write(struct ucb1x00 *ucb, unsigned int reg, unsigned int val)

{

	mcp_reg_write(ucb->mcp, reg, val);

}



/**

 *	ucb1x00_reg_read - read a UCB1x00 register

 *	@ucb: UCB1x00 structure describing chip

 *	@reg: UCB1x00 4-bit register index to write

 *

 *	Read the UCB1x00 register @reg and return its value.  The SIB

 *	clock must be running for this function to return.

 */

static inline unsigned int ucb1x00_reg_read(struct ucb1x00 *ucb, unsigned int reg)

{

	return mcp_reg_read(ucb->mcp, reg);

}

/**

 *	ucb1x00_set_audio_divisor - 

 *	@ucb: UCB1x00 structure describing chip

 *	@div: SIB clock divisor

 */

static inline void ucb1x00_set_audio_divisor(struct ucb1x00 *ucb, unsigned int div)

{

	mcp_set_audio_divisor(ucb->mcp, div);

}



/**

 *	ucb1x00_set_telecom_divisor -

 *	@ucb: UCB1x00 structure describing chip

 *	@div: SIB clock divisor

 */

static inline void ucb1x00_set_telecom_divisor(struct ucb1x00 *ucb, unsigned int div)

{

	mcp_set_telecom_divisor(ucb->mcp, div);

}



void ucb1x00_io_set_dir(struct ucb1x00 *ucb, unsigned int, unsigned int);

void ucb1x00_io_write(struct ucb1x00 *ucb, unsigned int, unsigned int);

unsigned int ucb1x00_io_read(struct ucb1x00 *ucb);



#define UCB_NOSYNC	(0)

#define UCB_SYNC	(1)



unsigned int ucb1x00_adc_read(struct ucb1x00 *ucb, int adc_channel, int sync);

void ucb1x00_adc_enable(struct ucb1x00 *ucb);

void ucb1x00_adc_disable(struct ucb1x00 *ucb);



/*

 * Which edges of the IRQ do you want to control today?

 */

#define UCB_RISING	(1 << 0)

#define UCB_FALLING	(1 << 1)



int ucb1x00_hook_irq(struct ucb1x00 *ucb, unsigned int idx, void (*fn)(int, void *), void *devid);

void ucb1x00_enable_irq(struct ucb1x00 *ucb, unsigned int idx, int edges);

void ucb1x00_disable_irq(struct ucb1x00 *ucb, unsigned int idx, int edges);

int ucb1x00_free_irq(struct ucb1x00 *ucb, unsigned int idx, void *devid);



#endif