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Commit 05709dfa authored by Sahitya Tummala's avatar Sahitya Tummala Committed by Xiaonian Wang
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mmc: sdhci: add a quirk to define non standard tuning



Some controllers need SW to compare the data received
from the card for a tuning command. Add a quirk for
such non standard controllers so that they can read
the data from the controller using ADMA/PIO and do the
tuning sequence from SW to determine the appropriate phase.

Change-Id: I15edfdf0442e3ac678c70df29482b3304cf1215a
Signed-off-by: default avatarSahitya Tummala <stummala@codeaurora.org>
[subhashj@codeaurora.org: fixed trivial merge conflicts]
Signed-off-by: default avatarSubhash Jadavani <subhashj@codeaurora.org>
[xiaonian@codeaurora.org: fixed trivial merge conflicts]
Signed-off-by: default avatarXiaonian Wang <xiaonian@codeaurora.org>
parent 738b74c6
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+4 −3
Original line number Diff line number Diff line
@@ -2984,8 +2984,9 @@ static void sdhci_data_irq(struct sdhci_host *host, u32 intmask)

	/* CMD19 generates _only_ Buffer Read Ready interrupt */
	if (intmask & SDHCI_INT_DATA_AVAIL) {
		if (command == MMC_SEND_TUNING_BLOCK ||
		    command == MMC_SEND_TUNING_BLOCK_HS200) {
		if (!(host->quirks2 & SDHCI_QUIRK2_NON_STANDARD_TUNING) &&
			(command == MMC_SEND_TUNING_BLOCK ||
			command == MMC_SEND_TUNING_BLOCK_HS200)) {
			host->tuning_done = 1;
			wake_up(&host->buf_ready_int);
			return;
@@ -3590,7 +3591,7 @@ static void sdhci_cmdq_set_transfer_params(struct mmc_host *mmc)
	if (host->version >= SDHCI_SPEC_200) {
		ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
		ctrl &= ~SDHCI_CTRL_DMA_MASK;
		if (host->flags & SDHCI_USE_ADMA_64BIT)
		if (host->flags & SDHCI_USE_64_BIT_DMA)
			ctrl |= SDHCI_CTRL_ADMA64;
		else
			ctrl |= SDHCI_CTRL_ADMA32;
+7 −0
Original line number Diff line number Diff line
@@ -508,6 +508,13 @@ struct sdhci_host {
/* Some controllers doesn't have have any LED control */
#define SDHCI_QUIRK2_BROKEN_LED_CONTROL			(1<<27)

/*
 * Some controllers doesn't follow the tuning procedure as defined in spec.
 * The tuning data has to be compared from SW driver to validate the correct
 * phase.
 */
#define SDHCI_QUIRK2_NON_STANDARD_TUNING (1 << 28)

	int irq;		/* Device IRQ */
	void __iomem *ioaddr;	/* Mapped address */