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Commit 053dfb5b authored by Vamsi Krishna Samavedam's avatar Vamsi Krishna Samavedam
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ARM: dts: msm: Update primary qmp phy parameters for SDM845



Update primary qmp phy parameters based on silicon characterization.

Change-Id: I36d1152a966cef4db5a97f0f9c5fcf0b29e41b21
Signed-off-by: default avatarVamsi Krishna Samavedam <vskrishn@codeaurora.org>
parent ebac0555
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+7 −0
Original line number Diff line number Diff line
@@ -222,6 +222,8 @@
			 0x14fc 0x80 0x00 /* RXA_RX_OFFSET_ADAPTOR_CNTRL2 */
			 0x1504 0x03 0x00 /* RXA_SIGDET_CNTRL */
			 0x150c 0x16 0x00 /* RXA_SIGDET_DEGLITCH_CNTRL */
			 0x1564 0x05 0x00 /* RXA_RX_MODE_00 */
			 0x14c0 0x03 0x00 /* RXA_VGA_CAL_CNTRL2 */
			 0x1830 0x0b 0x00 /* RXB_UCDR_FASTLOCK_FO_GAIN */
			 0x18d4 0x0f 0x00 /* RXB_RX_EQU_ADAPTOR_CNTRL2 */
			 0x18d8 0x4e 0x00 /* RXB_RX_EQU_ADAPTOR_CNTRL3 */
@@ -230,6 +232,8 @@
			 0x18fc 0x80 0x00 /* RXB_RX_OFFSET_ADAPTOR_CNTRL2 */
			 0x1904 0x03 0x00 /* RXB_SIGDET_CNTRL */
			 0x190c 0x16 0x00 /* RXB_SIGDET_DEGLITCH_CNTRL */
			 0x1964 0x05 0x00 /* RXB_RX_MODE_00 */
			 0x18c0 0x03 0x00 /* RXB_VGA_CAL_CNTRL2 */
			 0x1260 0x10 0x00 /* TXA_HIGHZ_DRVR_EN */
			 0x12a4 0x12 0x00 /* TXA_RCV_DETECT_LVL_2 */
			 0x128c 0x16 0x00 /* TXA_LANE_MODE_1 */
@@ -270,6 +274,8 @@
			 0x1c48 0x0d 0x00 /* PCS_TXDEEMPH_M3P5DB_V4 */
			 0x1c4c 0x15 0x00 /* PCS_TXDEEMPH_M6DB_LS */
			 0x1c50 0x0d 0x00 /* PCS_TXDEEMPH_M3P5DB_LS */
			 0x1e0c 0x21 0x00 /* PCS_REFGEN_REQ_CONFIG1 */
			 0x1e10 0x60 0x00 /* PCS_REFGEN_REQ_CONFIG2 */
			 0x1c5c 0x02 0x00 /* PCS_RATE_SLEW_CNTRL */
			 0x1ca0 0x04 0x00 /* PCS_PWRUP_RESET_DLY_TIME_AUXCLK */
			 0x1c8c 0x44 0x00 /* PCS_TSYNC_RSYNC_TIME */
@@ -280,6 +286,7 @@
			 0x1cb8 0x75 0x00 /* PCS_RXEQTRAINING_WAIT_TIME */
			 0x1cb0 0x86 0x00 /* PCS_LFPS_TX_ECSTART_EQTLOCK */
			 0x1cbc 0x13 0x00 /* PCS_RXEQTRAINING_RUN_TIME */
			 0x1cac 0x04 0x00 /* PCS_LFPS_DET_HIGH_COUNT_VAL */
			 0xffffffff 0xffffffff 0x00>;

		qcom,qmp-phy-reg-offset =