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Commit 053bfc53 authored by Paul Mundt's avatar Paul Mundt
Browse files

sh: multiple vectors per irq - mxg. 



Signed-off-by: default avatarPaul Mundt <lethal@linux-sh.org>
parent 5dece2bb

arch/sh/kernel/cpu/sh2a/setup-mxg.c

+23 −42
Original line number Diff line number Diff line 
/*

 * Renesas MX-G (R8A03022BG) Setup

 *

 *  Copyright (C) 2008  Paul Mundt

 *  Copyright (C) 2008, 2009  Paul Mundt

 *

 * This file is subject to the terms and conditions of the GNU General Public

 * License.  See the file "COPYING" in the main directory of this archive
@@ -20,23 +20,15 @@ enum { 
	IRQ8, IRQ9, IRQ10, IRQ11, IRQ12, IRQ13, IRQ14, IRQ15,



	PINT0, PINT1, PINT2, PINT3, PINT4, PINT5, PINT6, PINT7,



	SINT8, SINT7, SINT6, SINT5, SINT4, SINT3, SINT2, SINT1,



	SCIF0_BRI, SCIF0_ERI, SCIF0_RXI, SCIF0_TXI,

	SCIF1_BRI, SCIF1_ERI, SCIF1_RXI, SCIF1_TXI,

	SCIF0, SCIF1,



	MTU2_TGI0A, MTU2_TGI0B, MTU2_TGI0C, MTU2_TGI0D,

	MTU2_TCI0V, MTU2_TGI0E, MTU2_TGI0F,

	MTU2_TGI1A, MTU2_TGI1B, MTU2_TCI1V, MTU2_TCI1U,

	MTU2_TGI2A, MTU2_TGI2B, MTU2_TCI2V, MTU2_TCI2U,

	MTU2_TGI3A, MTU2_TGI3B, MTU2_TGI3C, MTU2_TGI3D, MTU2_TCI3V,

	MTU2_TGI4A, MTU2_TGI4B, MTU2_TGI4C, MTU2_TGI4D, MTU2_TCI4V,

	MTU2_TGI5U, MTU2_TGI5V, MTU2_TGI5W,

	MTU2_GROUP1, MTU2_GROUP2, MTU2_GROUP3, MTU2_GROUP4, MTU2_GROUP5

	MTU2_TGI3B, MTU2_TGI3C,



	/* interrupt groups */

	PINT, SCIF0, SCIF1,

	MTU2_GROUP1, MTU2_GROUP2, MTU2_GROUP3, MTU2_GROUP4, MTU2_GROUP5

	PINT,

};



static struct intc_vect vectors[] __initdata = {
@@ -59,47 +51,36 @@ static struct intc_vect vectors[] __initdata = { 
	INTC_IRQ(SINT4, 98), INTC_IRQ(SINT3, 99),

	INTC_IRQ(SINT2, 100), INTC_IRQ(SINT1, 101),



	INTC_IRQ(SCIF0_RXI, 220), INTC_IRQ(SCIF0_TXI, 221),

	INTC_IRQ(SCIF0_BRI, 222), INTC_IRQ(SCIF0_ERI, 223),

	INTC_IRQ(SCIF1_RXI, 224), INTC_IRQ(SCIF1_TXI, 225),

	INTC_IRQ(SCIF1_BRI, 226), INTC_IRQ(SCIF1_ERI, 227),

	INTC_IRQ(SCIF0, 220), INTC_IRQ(SCIF0, 221),

	INTC_IRQ(SCIF0, 222), INTC_IRQ(SCIF0, 223),

	INTC_IRQ(SCIF1, 224), INTC_IRQ(SCIF1, 225),

	INTC_IRQ(SCIF1, 226), INTC_IRQ(SCIF1, 227),



	INTC_IRQ(MTU2_TGI0A, 228), INTC_IRQ(MTU2_TGI0B, 229),

	INTC_IRQ(MTU2_TGI0C, 230), INTC_IRQ(MTU2_TGI0D, 231),

	INTC_IRQ(MTU2_TCI0V, 232), INTC_IRQ(MTU2_TGI0E, 233),

	INTC_IRQ(MTU2_GROUP1, 228), INTC_IRQ(MTU2_GROUP1, 229),

	INTC_IRQ(MTU2_GROUP1, 230), INTC_IRQ(MTU2_GROUP1, 231),

	INTC_IRQ(MTU2_GROUP1, 232), INTC_IRQ(MTU2_GROUP1, 233),



	INTC_IRQ(MTU2_TGI0F, 234), INTC_IRQ(MTU2_TGI1A, 235),

	INTC_IRQ(MTU2_TGI1B, 236), INTC_IRQ(MTU2_TCI1V, 237),

	INTC_IRQ(MTU2_TCI1U, 238), INTC_IRQ(MTU2_TGI2A, 239),

	INTC_IRQ(MTU2_GROUP2, 234), INTC_IRQ(MTU2_GROUP2, 235),

	INTC_IRQ(MTU2_GROUP2, 236), INTC_IRQ(MTU2_GROUP2, 237),

	INTC_IRQ(MTU2_GROUP2, 238), INTC_IRQ(MTU2_GROUP2, 239),



	INTC_IRQ(MTU2_TGI2B, 240), INTC_IRQ(MTU2_TCI2V, 241),

	INTC_IRQ(MTU2_TCI2U, 242), INTC_IRQ(MTU2_TGI3A, 243),

	INTC_IRQ(MTU2_GROUP3, 240), INTC_IRQ(MTU2_GROUP3, 241),

	INTC_IRQ(MTU2_GROUP3, 242), INTC_IRQ(MTU2_GROUP3, 243),



	INTC_IRQ(MTU2_TGI3B, 244),

	INTC_IRQ(MTU2_TGI3C, 245),



	INTC_IRQ(MTU2_TGI3D, 246), INTC_IRQ(MTU2_TCI3V, 247),

	INTC_IRQ(MTU2_TGI4A, 248), INTC_IRQ(MTU2_TGI4B, 249),

	INTC_IRQ(MTU2_TGI4C, 250), INTC_IRQ(MTU2_TGI4D, 251),

	INTC_IRQ(MTU2_GROUP4, 246), INTC_IRQ(MTU2_GROUP4, 247),

	INTC_IRQ(MTU2_GROUP4, 248), INTC_IRQ(MTU2_GROUP4, 249),

	INTC_IRQ(MTU2_GROUP4, 250), INTC_IRQ(MTU2_GROUP4, 251),



	INTC_IRQ(MTU2_TCI4V, 252), INTC_IRQ(MTU2_TGI5U, 253),

	INTC_IRQ(MTU2_TGI5V, 254), INTC_IRQ(MTU2_TGI5W, 255),

	INTC_IRQ(MTU2_GROUP5, 252), INTC_IRQ(MTU2_GROUP5, 253),

	INTC_IRQ(MTU2_GROUP5, 254), INTC_IRQ(MTU2_GROUP5, 255),

};



static struct intc_group groups[] __initdata = {

	INTC_GROUP(PINT, PINT0, PINT1, PINT2, PINT3,

		   PINT4, PINT5, PINT6, PINT7),

	INTC_GROUP(MTU2_GROUP1, MTU2_TGI0A, MTU2_TGI0B, MTU2_TGI0C, MTU2_TGI0D,

		   MTU2_TCI0V, MTU2_TGI0E),

	INTC_GROUP(MTU2_GROUP2, MTU2_TGI0F, MTU2_TGI1A, MTU2_TGI1B,

		   MTU2_TCI1V, MTU2_TCI1U, MTU2_TGI2A),

	INTC_GROUP(MTU2_GROUP3, MTU2_TGI2B, MTU2_TCI2V, MTU2_TCI2U,

		   MTU2_TGI3A),

	INTC_GROUP(MTU2_GROUP4, MTU2_TGI3D, MTU2_TCI3V, MTU2_TGI4A,

		   MTU2_TGI4B, MTU2_TGI4C, MTU2_TGI4D),

	INTC_GROUP(MTU2_GROUP5, MTU2_TCI4V, MTU2_TGI5U, MTU2_TGI5V, MTU2_TGI5W),

	INTC_GROUP(SCIF0, SCIF0_BRI, SCIF0_ERI, SCIF0_RXI, SCIF0_TXI),

	INTC_GROUP(SCIF1, SCIF1_BRI, SCIF1_ERI, SCIF1_RXI, SCIF1_TXI),

};



static struct intc_prio_reg prio_registers[] __initdata = {
@@ -137,7 +118,7 @@ static struct plat_sci_port sci_platform_data[] = { 
		.mapbase	= 0xff804000,

		.flags		= UPF_BOOT_AUTOCONF,

		.type		= PORT_SCIF,

		.irqs		= { 223, 220, 221, 222 },

		.irqs		= { 220, 220, 220, 220 },

	}, {

		.flags = 0,

	}