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Commit 0488f50e authored by Marek Szyprowski's avatar Marek Szyprowski Committed by Inki Dae
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drm/exynos: move dma_addr attribute from exynos plane to exynos fb 



DMA address is a framebuffer attribute and the right place for it is
exynos_drm_framebuffer not exynos_drm_plane. This patch also introduces
helper function for getting dma address of the given framebuffer.

Changelog v2:
- use state->fb instead of plane->base.fb.

Signed-off-by: default avatarMarek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: default avatarGustavo Padovan <gustavo.padovan@collabora.co.uk>
Signed-off-by: default avatarInki Dae <inki.dae@samsung.com>
parent 42f8119c

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

+8 −5
Original line number Diff line number Diff line
@@ -21,6 +21,7 @@ 


#include "exynos_drm_drv.h"

#include "exynos_drm_crtc.h"

#include "exynos_drm_fb.h"

#include "exynos_drm_plane.h"

#include "exynos_drm_iommu.h"
@@ -261,9 +262,11 @@ static void decon_update_plane(struct exynos_drm_crtc *crtc, 
{

	struct decon_context *ctx = crtc->ctx;

	struct drm_plane_state *state = plane->base.state;

	struct drm_framebuffer *fb = state->fb;

	unsigned int win = plane->zpos;

	unsigned int bpp = state->fb->bits_per_pixel >> 3;

	unsigned int pitch = state->fb->pitches[0];

	unsigned int bpp = fb->bits_per_pixel >> 3;

	unsigned int pitch = fb->pitches[0];

	dma_addr_t dma_addr = exynos_drm_fb_dma_addr(fb, 0);

	u32 val;



	if (test_bit(BIT_SUSPENDED, &ctx->flags))
@@ -284,9 +287,9 @@ static void decon_update_plane(struct exynos_drm_crtc *crtc, 
		VIDOSD_Wx_ALPHA_B_F(0x0);

	writel(val, ctx->addr + DECON_VIDOSDxD(win));



	writel(plane->dma_addr[0], ctx->addr + DECON_VIDW0xADD0B0(win));

	writel(dma_addr, ctx->addr + DECON_VIDW0xADD0B0(win));



	val = plane->dma_addr[0] + pitch * plane->crtc_h;

	val = dma_addr + pitch * plane->crtc_h;

	writel(val, ctx->addr + DECON_VIDW0xADD1B0(win));



	if (ctx->out_type != IFTYPE_HDMI)
@@ -297,7 +300,7 @@ static void decon_update_plane(struct exynos_drm_crtc *crtc, 
			| BIT_VAL(plane->crtc_w * bpp, 14, 0);

	writel(val, ctx->addr + DECON_VIDW0xADD2(win));



	decon_win_set_pixfmt(ctx, win, state->fb);

	decon_win_set_pixfmt(ctx, win, fb);



	/* window enable */

	decon_set_bits(ctx, DECON_WINCONx(win), WINCONx_ENWIN_F, ~0);

drivers/gpu/drm/exynos/exynos7_drm_decon.c

+9 −7
Original line number Diff line number Diff line
@@ -30,6 +30,7 @@ 
#include "exynos_drm_crtc.h"

#include "exynos_drm_plane.h"

#include "exynos_drm_drv.h"

#include "exynos_drm_fb.h"

#include "exynos_drm_fbdev.h"

#include "exynos_drm_iommu.h"
@@ -395,13 +396,14 @@ static void decon_update_plane(struct exynos_drm_crtc *crtc, 
{

	struct decon_context *ctx = crtc->ctx;

	struct drm_plane_state *state = plane->base.state;

	struct drm_framebuffer *fb = state->fb;

	int padding;

	unsigned long val, alpha;

	unsigned int last_x;

	unsigned int last_y;

	unsigned int win = plane->zpos;

	unsigned int bpp = state->fb->bits_per_pixel >> 3;

	unsigned int pitch = state->fb->pitches[0];

	unsigned int bpp = fb->bits_per_pixel >> 3;

	unsigned int pitch = fb->pitches[0];



	if (ctx->suspended)

		return;
@@ -417,14 +419,14 @@ static void decon_update_plane(struct exynos_drm_crtc *crtc, 
	 */



	/* buffer start address */

	val = (unsigned long)plane->dma_addr[0];

	val = (unsigned long)exynos_drm_fb_dma_addr(fb, 0);

	writel(val, ctx->regs + VIDW_BUF_START(win));



	padding = (pitch / bpp) - state->fb->width;

	padding = (pitch / bpp) - fb->width;



	/* buffer size */

	writel(state->fb->width + padding, ctx->regs + VIDW_WHOLE_X(win));

	writel(state->fb->height, ctx->regs + VIDW_WHOLE_Y(win));

	writel(fb->width + padding, ctx->regs + VIDW_WHOLE_X(win));

	writel(fb->height, ctx->regs + VIDW_WHOLE_Y(win));



	/* offset from the start of the buffer to read */

	writel(plane->src_x, ctx->regs + VIDW_OFFSET_X(win));
@@ -466,7 +468,7 @@ static void decon_update_plane(struct exynos_drm_crtc *crtc, 


	writel(alpha, ctx->regs + VIDOSD_D(win));



	decon_win_set_pixfmt(ctx, win, state->fb);

	decon_win_set_pixfmt(ctx, win, fb);



	/* hardware window 0 doesn't support color key. */

	if (win != 0)

drivers/gpu/drm/exynos/exynos_drm_drv.h

+0 −3
Original line number Diff line number Diff line
@@ -54,8 +54,6 @@ enum exynos_drm_output_type { 
 * @crtc_h: window height to be displayed (hardware screen).

 * @h_ratio: horizontal scaling ratio, 16.16 fixed point

 * @v_ratio: vertical scaling ratio, 16.16 fixed point

 * @dma_addr: array of bus(accessed by dma) address to the memory region

 *	      allocated for a overlay.

 * @zpos: order of overlay layer(z position).

 *

 * this structure is common to exynos SoC and its contents would be copied
@@ -74,7 +72,6 @@ struct exynos_drm_plane { 
	unsigned int crtc_h;

	unsigned int h_ratio;

	unsigned int v_ratio;

	dma_addr_t dma_addr[MAX_FB_BUFFER];

	unsigned int zpos;

	struct drm_framebuffer *pending_fb;

};

drivers/gpu/drm/exynos/exynos_drm_fb.c

+6 −10
Original line number Diff line number Diff line
@@ -37,6 +37,7 @@ 
struct exynos_drm_fb {

	struct drm_framebuffer	fb;

	struct exynos_drm_gem	*exynos_gem[MAX_FB_BUFFER];

	dma_addr_t			dma_addr[MAX_FB_BUFFER];

};



static int check_fb_gem_memory_type(struct drm_device *drm_dev,
@@ -135,6 +136,8 @@ exynos_drm_framebuffer_init(struct drm_device *dev, 
			goto err;



		exynos_fb->exynos_gem[i] = exynos_gem[i];

		exynos_fb->dma_addr[i] = exynos_gem[i]->dma_addr

						+ mode_cmd->offsets[i];

	}



	drm_helper_mode_fill_fb_struct(&exynos_fb->fb, mode_cmd);
@@ -189,21 +192,14 @@ exynos_user_fb_create(struct drm_device *dev, struct drm_file *file_priv, 
	return ERR_PTR(ret);

}



struct exynos_drm_gem *exynos_drm_fb_gem(struct drm_framebuffer *fb, int index)

dma_addr_t exynos_drm_fb_dma_addr(struct drm_framebuffer *fb, int index)

{

	struct exynos_drm_fb *exynos_fb = to_exynos_fb(fb);

	struct exynos_drm_gem *exynos_gem;



	if (index >= MAX_FB_BUFFER)

		return NULL;

		return DMA_ERROR_CODE;



	exynos_gem = exynos_fb->exynos_gem[index];

	if (!exynos_gem)

		return NULL;



	DRM_DEBUG_KMS("dma_addr: 0x%lx\n", (unsigned long)exynos_gem->dma_addr);



	return exynos_gem;

	return exynos_fb->dma_addr[index];

}



static void exynos_drm_output_poll_changed(struct drm_device *dev)

drivers/gpu/drm/exynos/exynos_drm_fb.h

+1 −2
Original line number Diff line number Diff line
@@ -22,8 +22,7 @@ exynos_drm_framebuffer_init(struct drm_device *dev, 
			    struct exynos_drm_gem **exynos_gem,

			    int count);



/* get gem object of a drm framebuffer */

struct exynos_drm_gem *exynos_drm_fb_gem(struct drm_framebuffer *fb, int index);

dma_addr_t exynos_drm_fb_dma_addr(struct drm_framebuffer *fb, int index);



void exynos_drm_mode_config_init(struct drm_device *dev);