Loading drivers/pinctrl/qcom/pinctrl-msm.c +17 −71 Original line number Diff line number Diff line Loading @@ -28,7 +28,6 @@ #include <linux/gpio.h> #include <linux/interrupt.h> #include <linux/spinlock.h> #include <linux/syscore_ops.h> #include <linux/reboot.h> #include <linux/pm.h> #include <linux/log2.h> Loading Loading @@ -73,13 +72,11 @@ struct msm_pinctrl { void __iomem *regs; }; static struct msm_pinctrl *msm_pinctrl_data; static u32 msm_pinctrl_find_base(const struct msm_pinctrl_soc_data *soc_data, u32 gpio_id) static u32 msm_pinctrl_find_base(const struct msm_pinctrl *pctrl, u32 gpio_id) { int i; u32 val; const struct msm_pinctrl_soc_data *soc_data = pctrl->soc; if (gpio_id >= soc_data->ngpios || !soc_data->pin_base) return 0; Loading @@ -88,7 +85,7 @@ static u32 msm_pinctrl_find_base(const struct msm_pinctrl_soc_data *soc_data, return soc_data->pin_base[gpio_id]; for (i = 0; i < soc_data->n_tile_offsets; i++) { val = readl_relaxed(msm_pinctrl_data->regs + val = readl_relaxed(pctrl->regs + soc_data->tile_offsets[i] + STATUS_OFFSET + soc_data->reg_size * gpio_id); if (val) { Loading Loading @@ -177,7 +174,7 @@ static int msm_pinmux_set_mux(struct pinctrl_dev *pctldev, int i; g = &pctrl->soc->groups[group]; base = msm_pinctrl_find_base(pctrl->soc, group); base = msm_pinctrl_find_base(pctrl, group); mask = GENMASK(g->mux_bit + order_base_2(g->nfuncs) - 1, g->mux_bit); for (i = 0; i < g->nfuncs; i++) { Loading Loading @@ -261,7 +258,7 @@ static int msm_config_group_get(struct pinctrl_dev *pctldev, u32 val, base; g = &pctrl->soc->groups[group]; base = msm_pinctrl_find_base(pctrl->soc, group); base = msm_pinctrl_find_base(pctrl, group); ret = msm_config_reg(pctrl, g, param, &mask, &bit); if (ret < 0) Loading Loading @@ -328,7 +325,7 @@ static int msm_config_group_set(struct pinctrl_dev *pctldev, g = &pctrl->soc->groups[group]; base = msm_pinctrl_find_base(pctrl->soc, group); base = msm_pinctrl_find_base(pctrl, group); for (i = 0; i < num_configs; i++) { param = pinconf_to_config_param(configs[i]); arg = pinconf_to_config_argument(configs[i]); Loading Loading @@ -420,7 +417,7 @@ static int msm_gpio_direction_input(struct gpio_chip *chip, unsigned offset) u32 val, base; g = &pctrl->soc->groups[offset]; base = msm_pinctrl_find_base(pctrl->soc, offset); base = msm_pinctrl_find_base(pctrl, offset); spin_lock_irqsave(&pctrl->lock, flags); Loading @@ -441,7 +438,7 @@ static int msm_gpio_direction_output(struct gpio_chip *chip, unsigned offset, in u32 val, base; g = &pctrl->soc->groups[offset]; base = msm_pinctrl_find_base(pctrl->soc, offset); base = msm_pinctrl_find_base(pctrl, offset); spin_lock_irqsave(&pctrl->lock, flags); Loading @@ -468,7 +465,7 @@ static int msm_gpio_get(struct gpio_chip *chip, unsigned offset) u32 val, base; g = &pctrl->soc->groups[offset]; base = msm_pinctrl_find_base(pctrl->soc, offset); base = msm_pinctrl_find_base(pctrl, offset); val = readl(pctrl->regs + base + g->io_reg); return !!(val & BIT(g->in_bit)); Loading @@ -482,7 +479,7 @@ static void msm_gpio_set(struct gpio_chip *chip, unsigned offset, int value) u32 val, base; g = &pctrl->soc->groups[offset]; base = msm_pinctrl_find_base(pctrl->soc, offset); base = msm_pinctrl_find_base(pctrl, offset); spin_lock_irqsave(&pctrl->lock, flags); Loading Loading @@ -521,7 +518,7 @@ static void msm_gpio_dbg_show_one(struct seq_file *s, }; g = &pctrl->soc->groups[offset]; base = msm_pinctrl_find_base(pctrl->soc, offset); base = msm_pinctrl_find_base(pctrl, offset); ctl_reg = readl(pctrl->regs + base + g->ctl_reg); Loading Loading @@ -613,7 +610,7 @@ static void msm_gpio_irq_mask(struct irq_data *d) u32 val, base; g = &pctrl->soc->groups[d->hwirq]; base = msm_pinctrl_find_base(pctrl->soc, d->hwirq); base = msm_pinctrl_find_base(pctrl, d->hwirq); spin_lock_irqsave(&pctrl->lock, flags); Loading @@ -635,7 +632,7 @@ static void msm_gpio_irq_unmask(struct irq_data *d) u32 val, base; g = &pctrl->soc->groups[d->hwirq]; base = msm_pinctrl_find_base(pctrl->soc, d->hwirq); base = msm_pinctrl_find_base(pctrl, d->hwirq); spin_lock_irqsave(&pctrl->lock, flags); Loading @@ -657,7 +654,7 @@ static void msm_gpio_irq_ack(struct irq_data *d) u32 val, base; g = &pctrl->soc->groups[d->hwirq]; base = msm_pinctrl_find_base(pctrl->soc, d->hwirq); base = msm_pinctrl_find_base(pctrl, d->hwirq); spin_lock_irqsave(&pctrl->lock, flags); Loading @@ -683,7 +680,7 @@ static int msm_gpio_irq_set_type(struct irq_data *d, unsigned int type) u32 val, base; g = &pctrl->soc->groups[d->hwirq]; base = msm_pinctrl_find_base(pctrl->soc, d->hwirq); base = msm_pinctrl_find_base(pctrl, d->hwirq); spin_lock_irqsave(&pctrl->lock, flags); /* Loading Loading @@ -896,7 +893,7 @@ static void msm_gpio_irq_handler(struct irq_desc *desc) */ for_each_set_bit(i, pctrl->enabled_irqs, pctrl->chip.ngpio) { g = &pctrl->soc->groups[i]; base = msm_pinctrl_find_base(pctrl->soc, i); base = msm_pinctrl_find_base(pctrl, i); val = readl(pctrl->regs + base + g->intr_status_reg); if (val & BIT(g->intr_status_bit)) { irq_pin = irq_find_mapping(gc->irqdomain, i); Loading Loading @@ -1044,54 +1041,6 @@ static void msm_pinctrl_setup_pm_reset(struct msm_pinctrl *pctrl) } } #ifdef CONFIG_PM static int msm_pinctrl_suspend(void) { return 0; } static void msm_pinctrl_resume(void) { int i, irq; u32 val; unsigned long flags; struct irq_desc *desc; const struct msm_pingroup *g; const char *name = "null"; struct msm_pinctrl *pctrl = msm_pinctrl_data; u32 base; if (!msm_show_resume_irq_mask) return; spin_lock_irqsave(&pctrl->lock, flags); for_each_set_bit(i, pctrl->enabled_irqs, pctrl->chip.ngpio) { g = &pctrl->soc->groups[i]; base = msm_pinctrl_find_base(pctrl->soc, i); val = readl_relaxed(pctrl->regs + base + g->intr_status_reg); if (val & BIT(g->intr_status_bit)) { irq = irq_find_mapping(pctrl->chip.irqdomain, i); desc = irq_to_desc(irq); if (desc == NULL) name = "stray irq"; else if (desc->action && desc->action->name) name = desc->action->name; pr_warn("%s: %d triggered %s\n", __func__, irq, name); } } spin_unlock_irqrestore(&pctrl->lock, flags); } #else #define msm_pinctrl_suspend NULL #define msm_pinctrl_resume NULL #endif static struct syscore_ops msm_pinctrl_pm_ops = { .suspend = msm_pinctrl_suspend, .resume = msm_pinctrl_resume, }; int msm_pinctrl_probe(struct platform_device *pdev, const struct msm_pinctrl_soc_data *soc_data) { Loading @@ -1099,8 +1048,7 @@ int msm_pinctrl_probe(struct platform_device *pdev, struct resource *res; int ret; msm_pinctrl_data = pctrl = devm_kzalloc(&pdev->dev, sizeof(*pctrl), GFP_KERNEL); pctrl = devm_kzalloc(&pdev->dev, sizeof(*pctrl), GFP_KERNEL); if (!pctrl) { dev_err(&pdev->dev, "Can't allocate msm_pinctrl\n"); return -ENOMEM; Loading Loading @@ -1140,7 +1088,6 @@ int msm_pinctrl_probe(struct platform_device *pdev, platform_set_drvdata(pdev, pctrl); register_syscore_ops(&msm_pinctrl_pm_ops); dev_dbg(&pdev->dev, "Probed Qualcomm pinctrl driver\n"); return 0; Loading @@ -1154,7 +1101,6 @@ int msm_pinctrl_remove(struct platform_device *pdev) gpiochip_remove(&pctrl->chip); unregister_restart_handler(&pctrl->restart_nb); unregister_syscore_ops(&msm_pinctrl_pm_ops); return 0; } Loading drivers/pinctrl/qcom/pinctrl-msm.h +0 −1 Original line number Diff line number Diff line Loading @@ -139,5 +139,4 @@ int msm_pinctrl_probe(struct platform_device *pdev, const struct msm_pinctrl_soc_data *soc_data); int msm_pinctrl_remove(struct platform_device *pdev); extern int msm_show_resume_irq_mask; #endif drivers/spmi/spmi-pmic-arb.c +9 −43 Original line number Diff line number Diff line Loading @@ -24,7 +24,6 @@ #include <linux/platform_device.h> #include <linux/slab.h> #include <linux/spmi.h> #include <linux/syscore_ops.h> /* PMIC Arbiter configuration registers */ #define PMIC_ARB_VERSION 0x0000 Loading Loading @@ -174,7 +173,6 @@ struct spmi_pmic_arb { u16 last_apid; struct apid_data apid_data[PMIC_ARB_MAX_PERIPHS]; }; static struct spmi_pmic_arb *the_pa; /** * pmic_arb_ver: version dependent functionality. Loading Loading @@ -535,7 +533,7 @@ static void cleanup_irq(struct spmi_pmic_arb *pa, u16 apid, int id) writel_relaxed(irq_mask, pa->intr + pa->ver_ops->irq_clear(apid)); } static void periph_interrupt(struct spmi_pmic_arb *pa, u16 apid, bool show) static void periph_interrupt(struct spmi_pmic_arb *pa, u16 apid) { unsigned int irq; u32 status; Loading @@ -552,26 +550,14 @@ static void periph_interrupt(struct spmi_pmic_arb *pa, u16 apid, bool show) cleanup_irq(pa, apid, id); continue; } if (show) { struct irq_desc *desc; const char *name = "null"; desc = irq_to_desc(irq); if (desc == NULL) name = "stray irq"; else if (desc->action && desc->action->name) name = desc->action->name; pr_warn("spmi_show_resume_irq: %d triggered [0x%01x, 0x%02x, 0x%01x] %s\n", irq, sid, per, id, name); } else { generic_handle_irq(irq); } } } static void __pmic_arb_chained_irq(struct spmi_pmic_arb *pa, bool show) static void pmic_arb_chained_irq(struct irq_desc *desc) { struct spmi_pmic_arb *pa = irq_desc_get_handler_data(desc); struct irq_chip *chip = irq_desc_get_chip(desc); int first = pa->min_apid >> 5; int last = pa->max_apid >> 5; u32 status, enable; Loading @@ -580,6 +566,8 @@ static void __pmic_arb_chained_irq(struct spmi_pmic_arb *pa, bool show) bool acc_valid = false; u32 irq_status = 0; chained_irq_enter(chip, desc); for (i = first; i <= last; ++i) { status = readl_relaxed(pa->acc_status + pa->ver_ops->owner_acc_status(pa->ee, i)); Loading @@ -598,7 +586,7 @@ static void __pmic_arb_chained_irq(struct spmi_pmic_arb *pa, bool show) enable = readl_relaxed(pa->intr + pa->ver_ops->acc_enable(apid)); if (enable & SPMI_PIC_ACC_ENABLE_BIT) periph_interrupt(pa, apid, show); periph_interrupt(pa, apid); } } Loading @@ -618,20 +606,12 @@ static void __pmic_arb_chained_irq(struct spmi_pmic_arb *pa, bool show) dev_dbg(&pa->spmic->dev, "Dispatching IRQ for apid=%d status=%x\n", i, irq_status); periph_interrupt(pa, i, show); } periph_interrupt(pa, i); } } } } static void pmic_arb_chained_irq(struct irq_desc *desc) { struct spmi_pmic_arb *pa = irq_desc_get_handler_data(desc); struct irq_chip *chip = irq_desc_get_chip(desc); chained_irq_enter(chip, desc); __pmic_arb_chained_irq(pa, false); chained_irq_exit(chip, desc); } Loading Loading @@ -1221,16 +1201,6 @@ static const struct irq_domain_ops pmic_arb_irq_domain_ops = { .activate = qpnpint_irq_domain_activate, }; static void spmi_pmic_arb_resume(void) { if (spmi_show_resume_irq()) __pmic_arb_chained_irq(the_pa, true); } static struct syscore_ops spmi_pmic_arb_syscore_ops = { .resume = spmi_pmic_arb_resume, }; static int spmi_pmic_arb_probe(struct platform_device *pdev) { struct spmi_pmic_arb *pa; Loading Loading @@ -1417,8 +1387,6 @@ static int spmi_pmic_arb_probe(struct platform_device *pdev) if (err) goto err_domain_remove; the_pa = pa; register_syscore_ops(&spmi_pmic_arb_syscore_ops); return 0; err_domain_remove: Loading @@ -1436,8 +1404,6 @@ static int spmi_pmic_arb_remove(struct platform_device *pdev) spmi_controller_remove(ctrl); irq_set_chained_handler_and_data(pa->irq, NULL, NULL); unregister_syscore_ops(&spmi_pmic_arb_syscore_ops); the_pa = NULL; irq_domain_remove(pa->domain); spmi_controller_put(ctrl); return 0; Loading include/linux/sched_clock.h +4 −0 Original line number Diff line number Diff line Loading @@ -13,6 +13,8 @@ extern void sched_clock_postinit(void); extern void sched_clock_register(u64 (*read)(void), int bits, unsigned long rate); extern int sched_clock_suspend(void); extern void sched_clock_resume(void); #else static inline void sched_clock_postinit(void) { } Loading @@ -21,6 +23,8 @@ static inline void sched_clock_register(u64 (*read)(void), int bits, { ; } static inline int sched_clock_suspend(void) { return 0; } static inline void sched_clock_resume(void) { } #endif #endif include/linux/spmi.h +1 −14 Original line number Diff line number Diff line /* Copyright (c) 2012-2016, The Linux Foundation. All rights reserved. /* Copyright (c) 2012-2017, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -171,19 +171,6 @@ static inline void spmi_driver_unregister(struct spmi_driver *sdrv) module_driver(__spmi_driver, spmi_driver_register, \ spmi_driver_unregister) #ifdef CONFIG_QCOM_SHOW_RESUME_IRQ extern int msm_show_resume_irq_mask; static inline bool spmi_show_resume_irq(void) { return msm_show_resume_irq_mask; } #else static inline bool spmi_show_resume_irq(void) { return false; } #endif int spmi_register_read(struct spmi_device *sdev, u8 addr, u8 *buf); int spmi_ext_register_read(struct spmi_device *sdev, u8 addr, u8 *buf, size_t len); Loading Loading
drivers/pinctrl/qcom/pinctrl-msm.c +17 −71 Original line number Diff line number Diff line Loading @@ -28,7 +28,6 @@ #include <linux/gpio.h> #include <linux/interrupt.h> #include <linux/spinlock.h> #include <linux/syscore_ops.h> #include <linux/reboot.h> #include <linux/pm.h> #include <linux/log2.h> Loading Loading @@ -73,13 +72,11 @@ struct msm_pinctrl { void __iomem *regs; }; static struct msm_pinctrl *msm_pinctrl_data; static u32 msm_pinctrl_find_base(const struct msm_pinctrl_soc_data *soc_data, u32 gpio_id) static u32 msm_pinctrl_find_base(const struct msm_pinctrl *pctrl, u32 gpio_id) { int i; u32 val; const struct msm_pinctrl_soc_data *soc_data = pctrl->soc; if (gpio_id >= soc_data->ngpios || !soc_data->pin_base) return 0; Loading @@ -88,7 +85,7 @@ static u32 msm_pinctrl_find_base(const struct msm_pinctrl_soc_data *soc_data, return soc_data->pin_base[gpio_id]; for (i = 0; i < soc_data->n_tile_offsets; i++) { val = readl_relaxed(msm_pinctrl_data->regs + val = readl_relaxed(pctrl->regs + soc_data->tile_offsets[i] + STATUS_OFFSET + soc_data->reg_size * gpio_id); if (val) { Loading Loading @@ -177,7 +174,7 @@ static int msm_pinmux_set_mux(struct pinctrl_dev *pctldev, int i; g = &pctrl->soc->groups[group]; base = msm_pinctrl_find_base(pctrl->soc, group); base = msm_pinctrl_find_base(pctrl, group); mask = GENMASK(g->mux_bit + order_base_2(g->nfuncs) - 1, g->mux_bit); for (i = 0; i < g->nfuncs; i++) { Loading Loading @@ -261,7 +258,7 @@ static int msm_config_group_get(struct pinctrl_dev *pctldev, u32 val, base; g = &pctrl->soc->groups[group]; base = msm_pinctrl_find_base(pctrl->soc, group); base = msm_pinctrl_find_base(pctrl, group); ret = msm_config_reg(pctrl, g, param, &mask, &bit); if (ret < 0) Loading Loading @@ -328,7 +325,7 @@ static int msm_config_group_set(struct pinctrl_dev *pctldev, g = &pctrl->soc->groups[group]; base = msm_pinctrl_find_base(pctrl->soc, group); base = msm_pinctrl_find_base(pctrl, group); for (i = 0; i < num_configs; i++) { param = pinconf_to_config_param(configs[i]); arg = pinconf_to_config_argument(configs[i]); Loading Loading @@ -420,7 +417,7 @@ static int msm_gpio_direction_input(struct gpio_chip *chip, unsigned offset) u32 val, base; g = &pctrl->soc->groups[offset]; base = msm_pinctrl_find_base(pctrl->soc, offset); base = msm_pinctrl_find_base(pctrl, offset); spin_lock_irqsave(&pctrl->lock, flags); Loading @@ -441,7 +438,7 @@ static int msm_gpio_direction_output(struct gpio_chip *chip, unsigned offset, in u32 val, base; g = &pctrl->soc->groups[offset]; base = msm_pinctrl_find_base(pctrl->soc, offset); base = msm_pinctrl_find_base(pctrl, offset); spin_lock_irqsave(&pctrl->lock, flags); Loading @@ -468,7 +465,7 @@ static int msm_gpio_get(struct gpio_chip *chip, unsigned offset) u32 val, base; g = &pctrl->soc->groups[offset]; base = msm_pinctrl_find_base(pctrl->soc, offset); base = msm_pinctrl_find_base(pctrl, offset); val = readl(pctrl->regs + base + g->io_reg); return !!(val & BIT(g->in_bit)); Loading @@ -482,7 +479,7 @@ static void msm_gpio_set(struct gpio_chip *chip, unsigned offset, int value) u32 val, base; g = &pctrl->soc->groups[offset]; base = msm_pinctrl_find_base(pctrl->soc, offset); base = msm_pinctrl_find_base(pctrl, offset); spin_lock_irqsave(&pctrl->lock, flags); Loading Loading @@ -521,7 +518,7 @@ static void msm_gpio_dbg_show_one(struct seq_file *s, }; g = &pctrl->soc->groups[offset]; base = msm_pinctrl_find_base(pctrl->soc, offset); base = msm_pinctrl_find_base(pctrl, offset); ctl_reg = readl(pctrl->regs + base + g->ctl_reg); Loading Loading @@ -613,7 +610,7 @@ static void msm_gpio_irq_mask(struct irq_data *d) u32 val, base; g = &pctrl->soc->groups[d->hwirq]; base = msm_pinctrl_find_base(pctrl->soc, d->hwirq); base = msm_pinctrl_find_base(pctrl, d->hwirq); spin_lock_irqsave(&pctrl->lock, flags); Loading @@ -635,7 +632,7 @@ static void msm_gpio_irq_unmask(struct irq_data *d) u32 val, base; g = &pctrl->soc->groups[d->hwirq]; base = msm_pinctrl_find_base(pctrl->soc, d->hwirq); base = msm_pinctrl_find_base(pctrl, d->hwirq); spin_lock_irqsave(&pctrl->lock, flags); Loading @@ -657,7 +654,7 @@ static void msm_gpio_irq_ack(struct irq_data *d) u32 val, base; g = &pctrl->soc->groups[d->hwirq]; base = msm_pinctrl_find_base(pctrl->soc, d->hwirq); base = msm_pinctrl_find_base(pctrl, d->hwirq); spin_lock_irqsave(&pctrl->lock, flags); Loading @@ -683,7 +680,7 @@ static int msm_gpio_irq_set_type(struct irq_data *d, unsigned int type) u32 val, base; g = &pctrl->soc->groups[d->hwirq]; base = msm_pinctrl_find_base(pctrl->soc, d->hwirq); base = msm_pinctrl_find_base(pctrl, d->hwirq); spin_lock_irqsave(&pctrl->lock, flags); /* Loading Loading @@ -896,7 +893,7 @@ static void msm_gpio_irq_handler(struct irq_desc *desc) */ for_each_set_bit(i, pctrl->enabled_irqs, pctrl->chip.ngpio) { g = &pctrl->soc->groups[i]; base = msm_pinctrl_find_base(pctrl->soc, i); base = msm_pinctrl_find_base(pctrl, i); val = readl(pctrl->regs + base + g->intr_status_reg); if (val & BIT(g->intr_status_bit)) { irq_pin = irq_find_mapping(gc->irqdomain, i); Loading Loading @@ -1044,54 +1041,6 @@ static void msm_pinctrl_setup_pm_reset(struct msm_pinctrl *pctrl) } } #ifdef CONFIG_PM static int msm_pinctrl_suspend(void) { return 0; } static void msm_pinctrl_resume(void) { int i, irq; u32 val; unsigned long flags; struct irq_desc *desc; const struct msm_pingroup *g; const char *name = "null"; struct msm_pinctrl *pctrl = msm_pinctrl_data; u32 base; if (!msm_show_resume_irq_mask) return; spin_lock_irqsave(&pctrl->lock, flags); for_each_set_bit(i, pctrl->enabled_irqs, pctrl->chip.ngpio) { g = &pctrl->soc->groups[i]; base = msm_pinctrl_find_base(pctrl->soc, i); val = readl_relaxed(pctrl->regs + base + g->intr_status_reg); if (val & BIT(g->intr_status_bit)) { irq = irq_find_mapping(pctrl->chip.irqdomain, i); desc = irq_to_desc(irq); if (desc == NULL) name = "stray irq"; else if (desc->action && desc->action->name) name = desc->action->name; pr_warn("%s: %d triggered %s\n", __func__, irq, name); } } spin_unlock_irqrestore(&pctrl->lock, flags); } #else #define msm_pinctrl_suspend NULL #define msm_pinctrl_resume NULL #endif static struct syscore_ops msm_pinctrl_pm_ops = { .suspend = msm_pinctrl_suspend, .resume = msm_pinctrl_resume, }; int msm_pinctrl_probe(struct platform_device *pdev, const struct msm_pinctrl_soc_data *soc_data) { Loading @@ -1099,8 +1048,7 @@ int msm_pinctrl_probe(struct platform_device *pdev, struct resource *res; int ret; msm_pinctrl_data = pctrl = devm_kzalloc(&pdev->dev, sizeof(*pctrl), GFP_KERNEL); pctrl = devm_kzalloc(&pdev->dev, sizeof(*pctrl), GFP_KERNEL); if (!pctrl) { dev_err(&pdev->dev, "Can't allocate msm_pinctrl\n"); return -ENOMEM; Loading Loading @@ -1140,7 +1088,6 @@ int msm_pinctrl_probe(struct platform_device *pdev, platform_set_drvdata(pdev, pctrl); register_syscore_ops(&msm_pinctrl_pm_ops); dev_dbg(&pdev->dev, "Probed Qualcomm pinctrl driver\n"); return 0; Loading @@ -1154,7 +1101,6 @@ int msm_pinctrl_remove(struct platform_device *pdev) gpiochip_remove(&pctrl->chip); unregister_restart_handler(&pctrl->restart_nb); unregister_syscore_ops(&msm_pinctrl_pm_ops); return 0; } Loading
drivers/pinctrl/qcom/pinctrl-msm.h +0 −1 Original line number Diff line number Diff line Loading @@ -139,5 +139,4 @@ int msm_pinctrl_probe(struct platform_device *pdev, const struct msm_pinctrl_soc_data *soc_data); int msm_pinctrl_remove(struct platform_device *pdev); extern int msm_show_resume_irq_mask; #endif
drivers/spmi/spmi-pmic-arb.c +9 −43 Original line number Diff line number Diff line Loading @@ -24,7 +24,6 @@ #include <linux/platform_device.h> #include <linux/slab.h> #include <linux/spmi.h> #include <linux/syscore_ops.h> /* PMIC Arbiter configuration registers */ #define PMIC_ARB_VERSION 0x0000 Loading Loading @@ -174,7 +173,6 @@ struct spmi_pmic_arb { u16 last_apid; struct apid_data apid_data[PMIC_ARB_MAX_PERIPHS]; }; static struct spmi_pmic_arb *the_pa; /** * pmic_arb_ver: version dependent functionality. Loading Loading @@ -535,7 +533,7 @@ static void cleanup_irq(struct spmi_pmic_arb *pa, u16 apid, int id) writel_relaxed(irq_mask, pa->intr + pa->ver_ops->irq_clear(apid)); } static void periph_interrupt(struct spmi_pmic_arb *pa, u16 apid, bool show) static void periph_interrupt(struct spmi_pmic_arb *pa, u16 apid) { unsigned int irq; u32 status; Loading @@ -552,26 +550,14 @@ static void periph_interrupt(struct spmi_pmic_arb *pa, u16 apid, bool show) cleanup_irq(pa, apid, id); continue; } if (show) { struct irq_desc *desc; const char *name = "null"; desc = irq_to_desc(irq); if (desc == NULL) name = "stray irq"; else if (desc->action && desc->action->name) name = desc->action->name; pr_warn("spmi_show_resume_irq: %d triggered [0x%01x, 0x%02x, 0x%01x] %s\n", irq, sid, per, id, name); } else { generic_handle_irq(irq); } } } static void __pmic_arb_chained_irq(struct spmi_pmic_arb *pa, bool show) static void pmic_arb_chained_irq(struct irq_desc *desc) { struct spmi_pmic_arb *pa = irq_desc_get_handler_data(desc); struct irq_chip *chip = irq_desc_get_chip(desc); int first = pa->min_apid >> 5; int last = pa->max_apid >> 5; u32 status, enable; Loading @@ -580,6 +566,8 @@ static void __pmic_arb_chained_irq(struct spmi_pmic_arb *pa, bool show) bool acc_valid = false; u32 irq_status = 0; chained_irq_enter(chip, desc); for (i = first; i <= last; ++i) { status = readl_relaxed(pa->acc_status + pa->ver_ops->owner_acc_status(pa->ee, i)); Loading @@ -598,7 +586,7 @@ static void __pmic_arb_chained_irq(struct spmi_pmic_arb *pa, bool show) enable = readl_relaxed(pa->intr + pa->ver_ops->acc_enable(apid)); if (enable & SPMI_PIC_ACC_ENABLE_BIT) periph_interrupt(pa, apid, show); periph_interrupt(pa, apid); } } Loading @@ -618,20 +606,12 @@ static void __pmic_arb_chained_irq(struct spmi_pmic_arb *pa, bool show) dev_dbg(&pa->spmic->dev, "Dispatching IRQ for apid=%d status=%x\n", i, irq_status); periph_interrupt(pa, i, show); } periph_interrupt(pa, i); } } } } static void pmic_arb_chained_irq(struct irq_desc *desc) { struct spmi_pmic_arb *pa = irq_desc_get_handler_data(desc); struct irq_chip *chip = irq_desc_get_chip(desc); chained_irq_enter(chip, desc); __pmic_arb_chained_irq(pa, false); chained_irq_exit(chip, desc); } Loading Loading @@ -1221,16 +1201,6 @@ static const struct irq_domain_ops pmic_arb_irq_domain_ops = { .activate = qpnpint_irq_domain_activate, }; static void spmi_pmic_arb_resume(void) { if (spmi_show_resume_irq()) __pmic_arb_chained_irq(the_pa, true); } static struct syscore_ops spmi_pmic_arb_syscore_ops = { .resume = spmi_pmic_arb_resume, }; static int spmi_pmic_arb_probe(struct platform_device *pdev) { struct spmi_pmic_arb *pa; Loading Loading @@ -1417,8 +1387,6 @@ static int spmi_pmic_arb_probe(struct platform_device *pdev) if (err) goto err_domain_remove; the_pa = pa; register_syscore_ops(&spmi_pmic_arb_syscore_ops); return 0; err_domain_remove: Loading @@ -1436,8 +1404,6 @@ static int spmi_pmic_arb_remove(struct platform_device *pdev) spmi_controller_remove(ctrl); irq_set_chained_handler_and_data(pa->irq, NULL, NULL); unregister_syscore_ops(&spmi_pmic_arb_syscore_ops); the_pa = NULL; irq_domain_remove(pa->domain); spmi_controller_put(ctrl); return 0; Loading
include/linux/sched_clock.h +4 −0 Original line number Diff line number Diff line Loading @@ -13,6 +13,8 @@ extern void sched_clock_postinit(void); extern void sched_clock_register(u64 (*read)(void), int bits, unsigned long rate); extern int sched_clock_suspend(void); extern void sched_clock_resume(void); #else static inline void sched_clock_postinit(void) { } Loading @@ -21,6 +23,8 @@ static inline void sched_clock_register(u64 (*read)(void), int bits, { ; } static inline int sched_clock_suspend(void) { return 0; } static inline void sched_clock_resume(void) { } #endif #endif
include/linux/spmi.h +1 −14 Original line number Diff line number Diff line /* Copyright (c) 2012-2016, The Linux Foundation. All rights reserved. /* Copyright (c) 2012-2017, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -171,19 +171,6 @@ static inline void spmi_driver_unregister(struct spmi_driver *sdrv) module_driver(__spmi_driver, spmi_driver_register, \ spmi_driver_unregister) #ifdef CONFIG_QCOM_SHOW_RESUME_IRQ extern int msm_show_resume_irq_mask; static inline bool spmi_show_resume_irq(void) { return msm_show_resume_irq_mask; } #else static inline bool spmi_show_resume_irq(void) { return false; } #endif int spmi_register_read(struct spmi_device *sdev, u8 addr, u8 *buf); int spmi_ext_register_read(struct spmi_device *sdev, u8 addr, u8 *buf, size_t len); Loading