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Commit 03d289b7 authored by Kyle Yan's avatar Kyle Yan Committed by Gerrit - the friendly Code Review server
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Merge "clk: mdss: add delay for new pll locking sequence" into msm-4.8

parents 4cad2812 e59034a7
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Original line number Diff line number Diff line
@@ -921,6 +921,7 @@ static void pll_20nm_config_vco_start(void __iomem *pll_base)

	MDSS_PLL_REG_W(pll_base, MMSS_DSI_PHY_PLL_PLL_VCOTAIL_EN, 0x03);
	MDSS_PLL_REG_W(pll_base, MMSS_DSI_PHY_PLL_RESETSM_CNTRL3, 0x02);
	udelay(10);
	MDSS_PLL_REG_W(pll_base, MMSS_DSI_PHY_PLL_RESETSM_CNTRL3, 0x03);
}