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Commit 037708a1 authored by Tirupathi Reddy's avatar Tirupathi Reddy
Browse files

regulator: cpr4-apss: Update voltage corner configuration for sdm632 



Gold and Silver clusters contain dedicated 3 fuse corners for
each of them and also a common LowSVS fuse corner. Update the
voltage corner configuration defined for sdm632 as per new
fusing scheme.

CRs-Fixed: 2233570
Change-Id: Ida3e23e940c45174cc3136a2c589473d6cdb8ccb
Signed-off-by: default avatarTirupathi Reddy <tirupath@codeaurora.org>
parent 9b0f7eab

arch/arm64/boot/dts/qcom/sdm632-regulator.dtsi

+178 −13
Original line number Diff line number Diff line
@@ -143,10 +143,10 @@ 
				regulator-min-microvolt = <1>;

				regulator-max-microvolt = <7>;



				qcom,cpr-fuse-corners = <5>;

				qcom,cpr-fuse-corners = <4>;

				qcom,cpr-fuse-combos = <64>;

				qcom,cpr-corners = <7>;

				qcom,cpr-corner-fmax-map = <1 2 3 4 7>;

				qcom,cpr-corner-fmax-map = <1 3 4 7>;



				qcom,cpr-voltage-ceiling =

					<720000  790000 865000 865000 920000
@@ -170,8 +170,6 @@ 
				       1970 1880 2110 2010 2510 4900 4370 4780>,

				      <3600 3600 3830 2430 2520 2700 1790 1760

				       1970 1880 2110 2010 2510 4900 4370 4780>,

				      <3600 3600 3830 2430 2520 2700 1790 1760

				       1970 1880 2110 2010 2510 4900 4370 4780>,

				      <3600 3600 3830 2430 2520 2700 1790 1760

				       1970 1880 2110 2010 2510 4900 4370 4780>;
@@ -191,36 +189,203 @@ 
			apc1_perfcl_vreg: regulator {

				regulator-name = "apc1_perfcl_corner";

				regulator-min-microvolt = <1>;

				regulator-max-microvolt = <5>;

				regulator-max-microvolt = <7>;



				qcom,cpr-fuse-corners = <3>;

				qcom,cpr-fuse-corners = <4>;

				qcom,cpr-fuse-combos = <64>;

				qcom,cpr-corners = <5>;

				qcom,cpr-corner-fmax-map = <1 2 5>;

				qcom,cpr-corners = <7>;

				qcom,cpr-corner-fmax-map = <1 3 4 7>;



				qcom,cpr-voltage-ceiling =

					<865000 865000 920000 990000 1065000>;

					<720000 790000 865000 865000 920000

					 990000 1065000>;



				qcom,cpr-voltage-floor =

					<500000  500000 500000 500000 500000>;

					<500000 500000 500000 500000 500000

					 500000 500000>;



				qcom,mem-acc-voltage = <2 2 2 2 3>;

				qcom,mem-acc-voltage = <1 1 2 2 2 2 3>;



				qcom,corner-frequencies =

					<1094400000 1401600000 1555200000

					 1804800000 2016000000>;

					<633600000   902400000 1094400000

					 1401600000 1555200000 1804800000

					 2016000000>;



				qcom,cpr-ro-scaling-factor =

				      <3600 3600 3830 2430 2520 2700 1790 1760

				       1970 1880 2110 2010 2510 4900 4370 4780>,

				      <3600 3600 3830 2430 2520 2700 1790 1760

				       1970 1880 2110 2010 2510 4900 4370 4780>,

				      <3600 3600 3830 2430 2520 2700 1790 1760

				       1970 1880 2110 2010 2510 4900 4370 4780>,

				      <3600 3600 3830 2430 2520 2700 1790 1760

				       1970 1880 2110 2010 2510 4900 4370 4780>;



				qcom,allow-voltage-interpolation;

				qcom,allow-quotient-interpolation;

				qcom,cpr-scaled-open-loop-voltage-as-ceiling;



				qcom,cpr-open-loop-voltage-fuse-adjustment =

					/* Speed bin 0; CPR rev 0..7 */

					< 30000      0      0     0>,

					< 30000      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,



					/* Speed bin 1; CPR rev 0..7 */

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,



					/* Speed bin 2; CPR rev 0..7 */

					< 30000      0      0     0>,

					< 30000      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,



					/* Speed bin 3; CPR rev 0..7 */

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,



					/* Speed bin 4; CPR rev 0..7 */

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,



					/* Speed bin 5; CPR rev 0..7 */

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,



					/* Speed bin 6; CPR rev 0..7 */

					< 30000      0      0     0>,

					< 30000      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,



					/* Speed bin 7; CPR rev 0..7 */

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>;



				qcom,cpr-closed-loop-voltage-fuse-adjustment =

					/* Speed bin 0; CPR rev 0..7 */

					< 30000      0      0     0>,

					< 30000      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,



					/* Speed bin 1; CPR rev 0..7 */

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,



					/* Speed bin 2; CPR rev 0..7 */

					< 30000      0      0     0>,

					< 30000      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,



					/* Speed bin 3; CPR rev 0..7 */

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,



					/* Speed bin 4; CPR rev 0..7 */

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,



					/* Speed bin 5; CPR rev 0..7 */

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,



					/* Speed bin 6; CPR rev 0..7 */

					< 30000      0      0     0>,

					< 30000      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,



					/* Speed bin 7; CPR rev 0..7 */

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>;

			};

		};

	};

arch/arm64/boot/dts/qcom/sdm632.dtsi

+23 −13
Original line number Diff line number Diff line
@@ -824,10 +824,12 @@ 
		<  1804800000 7>;

	qcom,speed0-bin-v0-c1 =

		<          0 0>,

		<  1094400000 1>,

		<  1401600000 2>,

		<  1555200000 3>,

		<  1804800000 4>;

		<   633600000 1>,

		<   902400000 2>,

		<  1094400000 3>,

		<  1401600000 4>,

		<  1555200000 5>,

		<  1804800000 6>;

	qcom,speed0-bin-v0-cci =

		<          0 0>,

		<  307200000 1>,
@@ -848,10 +850,12 @@ 
		<  1804800000 7>;

	qcom,speed6-bin-v0-c1 =

		<          0 0>,

		<  1094400000 1>,

		<  1401600000 2>,

		<  1555200000 3>,

		<  1804800000 4>;

		<   633600000 1>,

		<   902400000 2>,

		<  1094400000 3>,

		<  1401600000 4>,

		<  1555200000 5>,

		<  1804800000 6>;

	qcom,speed6-bin-v0-cci =

		<          0 0>,

		<  307200000 1>,
@@ -872,11 +876,13 @@ 
		<  1804800000 7>;

	qcom,speed2-bin-v0-c1 =

		<          0 0>,

		<  1094400000 1>,

		<  1401600000 2>,

		<  1555200000 3>,

		<  1804800000 4>,

		<  2016000000 5>;

		<   633600000 1>,

		<   902400000 2>,

		<  1094400000 3>,

		<  1401600000 4>,

		<  1555200000 5>,

		<  1804800000 6>,

		<  2016000000 7>;

	qcom,speed2-bin-v0-cci =

		<          0 0>,

		<  307200000 1>,
@@ -914,6 +920,8 @@ 
			< 1804800 >;



		qcom,cpufreq-table-4 =

			<  633600 >,

			<  902400 >,

			< 1094400 >,

			< 1401600 >,

			< 1555200 >,
@@ -961,6 +969,8 @@ 
				< 1536000 768000>,      /* NOM+  */

				< 1670400 787200>;      /* TURBO */

			cpu-to-dev-map-4 =

				<  633600 307200>,      /* SVS   */

				<  902400 403200>,

				< 1094400 499200>,	/* SVS   */

				< 1401600 691200>,      /* NOM   */

				< 1555200 768000>,      /* NOM+  */

drivers/regulator/cpr4-apss-regulator.c

+16 −16
Original line number Diff line number Diff line
@@ -36,8 +36,8 @@ 
#include "cpr3-regulator.h"



#define MSM8953_APSS_FUSE_CORNERS	4

#define SDM632_POWER_APSS_FUSE_CORNERS	5

#define SDM632_PERF_APSS_FUSE_CORNERS	3

#define SDM632_POWER_APSS_FUSE_CORNERS	4

#define SDM632_PERF_APSS_FUSE_CORNERS	4



/**

 * struct cpr4_apss_fuses - APSS specific fuse data
@@ -103,27 +103,27 @@ static const char * const cpr4_msm8953_apss_fuse_corner_name[] = { 


enum cpr4_sdm632_power_apss_fuse_corner {

	CPR4_SDM632_POWER_APSS_FUSE_CORNER_LOWSVS	= 0,

	CPR4_SDM632_POWER_APSS_FUSE_CORNER_SVS		= 1,

	CPR4_SDM632_POWER_APSS_FUSE_CORNER_SVS_L1	= 2,

	CPR4_SDM632_POWER_APSS_FUSE_CORNER_NOM		= 3,

	CPR4_SDM632_POWER_APSS_FUSE_CORNER_TURBO_L1	= 4,

	CPR4_SDM632_POWER_APSS_FUSE_CORNER_SVS_L1	= 1,

	CPR4_SDM632_POWER_APSS_FUSE_CORNER_NOM		= 2,

	CPR4_SDM632_POWER_APSS_FUSE_CORNER_TURBO_L1	= 3,

};



static const char * const cpr4_sdm632_power_apss_fuse_corner_name[] = {

	[CPR4_SDM632_POWER_APSS_FUSE_CORNER_LOWSVS]	= "LowSVS",

	[CPR4_SDM632_POWER_APSS_FUSE_CORNER_SVS]	= "SVS",

	[CPR4_SDM632_POWER_APSS_FUSE_CORNER_SVS_L1]	= "SVS_L1",

	[CPR4_SDM632_POWER_APSS_FUSE_CORNER_NOM]	= "NOM",

	[CPR4_SDM632_POWER_APSS_FUSE_CORNER_TURBO_L1]	= "TURBO_L1",

};



enum cpr4_sdm632_perf_apss_fuse_corner {

	CPR4_SDM632_PERF_APSS_FUSE_CORNER_SVS_L1	= 0,

	CPR4_SDM632_PERF_APSS_FUSE_CORNER_NOM		= 1,

	CPR4_SDM632_PERF_APSS_FUSE_CORNER_TURBO_L1	= 2,

	CPR4_SDM632_PERF_APSS_FUSE_CORNER_LOWSVS	= 0,

	CPR4_SDM632_PERF_APSS_FUSE_CORNER_SVS_L1	= 1,

	CPR4_SDM632_PERF_APSS_FUSE_CORNER_NOM		= 2,

	CPR4_SDM632_PERF_APSS_FUSE_CORNER_TURBO_L1	= 3,

};



static const char * const cpr4_sdm632_perf_apss_fuse_corner_name[] = {

	[CPR4_SDM632_PERF_APSS_FUSE_CORNER_LOWSVS]	= "LowSVS",

	[CPR4_SDM632_PERF_APSS_FUSE_CORNER_SVS_L1]	= "SVS_L1",

	[CPR4_SDM632_PERF_APSS_FUSE_CORNER_NOM]		= "NOM",

	[CPR4_SDM632_PERF_APSS_FUSE_CORNER_TURBO_L1]	= "TURBO_L1",
@@ -229,12 +229,12 @@ static const struct cpr3_fuse_param 
sdm632_apss_ro_sel_param[2][SDM632_POWER_APSS_FUSE_CORNERS][2] = {

	[CPR4_APSS_POWER_CLUSTER_ID] = {

		{{73, 28, 31}, {} },

		{{73, 24, 27}, {} },

		{{73, 20, 23}, {} },

		{{73, 16, 19}, {} },

		{{73, 12, 15}, {} },

	},

	[CPR4_APSS_PERF_CLUSTER_ID] = {

		{{73, 28, 31}, {} },

		{{73,  8, 11}, {} },

		{{73,  4,  7}, {} },

		{{73,  0,  3}, {} },
@@ -245,12 +245,12 @@ static const struct cpr3_fuse_param 
sdm632_apss_init_voltage_param[2][SDM632_POWER_APSS_FUSE_CORNERS][2] = {

	[CPR4_APSS_POWER_CLUSTER_ID] = {

		{{74, 18, 23}, {} },

		{{74, 12, 17}, {} },

		{{71, 24, 29}, {} },

		{{74,  6, 11}, {} },

		{{74,  0,  5}, {} },

	},

	[CPR4_APSS_PERF_CLUSTER_ID] = {

		{{74, 18, 23}, {} },

		{{71, 18, 23}, {} },

		{{71, 12, 17}, {} },

		{{71,  6, 11}, {} },
@@ -261,12 +261,12 @@ static const struct cpr3_fuse_param 
sdm632_apss_target_quot_param[2][SDM632_POWER_APSS_FUSE_CORNERS][2] = {

	[CPR4_APSS_POWER_CLUSTER_ID] = {

		{{75, 44, 55}, {} },

		{{75, 32, 43}, {} },

		{{72, 44, 55}, {} },

		{{75, 20, 31}, {} },

		{{75,  8, 19}, {} },

	},

	[CPR4_APSS_PERF_CLUSTER_ID] = {

		{{75, 44, 55}, {} },

		{{72, 32, 43}, {} },

		{{72, 20, 31}, {} },

		{{72,  8, 19}, {} },
@@ -277,13 +277,13 @@ static const struct cpr3_fuse_param 
sdm632_apss_quot_offset_param[2][SDM632_POWER_APSS_FUSE_CORNERS][2] = {

	[CPR4_APSS_POWER_CLUSTER_ID] = {

		{{} },

		{{74, 39, 45}, {} },

		{{71, 46, 52}, {} },

		{{74, 32, 38}, {} },

		{{74, 24, 30}, {} },

	},

	[CPR4_APSS_PERF_CLUSTER_ID] = {

		{{} },

		{{74, 39, 45}, {} },

		{{71, 39, 45}, {} },

		{{71, 32, 38}, {} },

	},
@@ -322,12 +322,12 @@ static const int 
sdm632_apss_fuse_ref_volt[2][SDM632_POWER_APSS_FUSE_CORNERS] = {

	[CPR4_APSS_POWER_CLUSTER_ID] = {

		645000,

		720000,

		790000,

		865000,

		1065000,

	},

	[CPR4_APSS_PERF_CLUSTER_ID] = {

		645000,

		790000,

		865000,

		1065000,
@@ -1025,7 +1025,7 @@ static int cpr4_apss_calculate_target_quotients(struct cpr3_regulator *vreg) 
		} else {

			corner_name = cpr4_sdm632_perf_apss_fuse_corner_name;

			lowest_fuse_corner =

				CPR4_SDM632_PERF_APSS_FUSE_CORNER_SVS_L1;

				CPR4_SDM632_PERF_APSS_FUSE_CORNER_LOWSVS;

			highest_fuse_corner =

				CPR4_SDM632_PERF_APSS_FUSE_CORNER_TURBO_L1;

		}