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Commit 02e95f73 authored by Kyle Yan's avatar Kyle Yan
Browse files

ARM: dts: msm: Add support for CDSP PIL on msmskunk 



Add devicetree node for CDSP PIL which facilitates the loading of
CDSP firmware, authentication and bringing it out of reset.

Change-Id: I5088b3ebcc2f230cb318c0a853763cb580116335
Signed-off-by: default avatarKyle Yan <kyan@codeaurora.org>
parent 384b13c1

arch/arm64/boot/dts/qcom/msmskunk-smp2p.dtsi

+23 −0
Original line number Diff line number Diff line
@@ -238,4 +238,27 @@ 
		interrupt-controller;

		#interrupt-cells = <2>;

	};



	/* ssr - inbound entry from cdsp */

	smp2pgpio_ssr_smp2p_5_in: qcom,smp2pgpio-ssr-smp2p-5-in {

		compatible = "qcom,smp2pgpio";

		qcom,entry-name = "slave-kernel";

		qcom,remote-pid = <5>;

		qcom,is-inbound;

		gpio-controller;

		#gpio-cells = <2>;

		interrupt-controller;

		#interrupt-cells = <2>;

	};



	/* ssr - outbound entry to cdsp */

	smp2pgpio_ssr_smp2p_5_out: qcom,smp2pgpio-ssr-smp2p-5-out {

		compatible = "qcom,smp2pgpio";

		qcom,entry-name = "master-kernel";

		qcom,remote-pid = <5>;

		gpio-controller;

		#gpio-cells = <2>;

		interrupt-controller;

		#interrupt-cells = <2>;

	};

};

arch/arm64/boot/dts/qcom/msmskunk.dtsi

+32 −0
Original line number Diff line number Diff line
@@ -585,6 +585,38 @@ 
		qcom,wakeup-enable;

	};



	qcom,turing@8300000 {

		compatible = "qcom,pil-tz-generic";

		reg = <0x8300000 0x100000>;

		interrupts = <0 578 1>;



		vdd_cx-supply = <&pmcobalt_s9_level>;

		qcom,proxy-reg-names = "vdd_cx";

		qcom,vdd_cx-uV-uA = <RPMH_REGULATOR_LEVEL_MAX 100000>;



		clocks = <&clock_gcc RPMH_CXO_CLK>;

		clock-names = "xo";

		qcom,proxy-clock-names = "xo";



		qcom,pas-id = <18>;

		qcom,proxy-timeout-ms = <10000>;

		qcom,smem-id = <423>;

		qcom,sysmon-id = <7>;

		qcom,ssctl-instance-id = <0x17>;

		qcom,firmware-name = "cdsp";

		memory-region = <&pil_cdsp_mem>;



		/* GPIO inputs from turing */

		qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_5_in 0 0>;

		qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_5_in 2 0>;

		qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_5_in 1 0>;

		qcom,gpio-stop-ack = <&smp2pgpio_ssr_smp2p_5_in 3 0>;



		/* GPIO output to turing*/

		qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_5_out 0 0>;

		status = "ok";

	};



	qcom,msm-imem@146bf000 {

		compatible = "qcom,msm-imem";

		reg = <0x146bf000 0x1000>;