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Commit 02617bdb authored by Deepak Katragadda's avatar Deepak Katragadda Committed by Gerrit - the friendly Code Review server
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clk: qcom: clk-cpu-osm: Vote on the MX rail on behalf of CPU clocks 



Cast an explicit vote on the MX rail depending on the current
L3 and silver clock domain frequencies. This is needed to
resolve issues root caused to under-volting memories supplied
by this rail.

Change-Id: Id89463a958c071f2a3acab354f1633c558110b07
Signed-off-by: default avatarDeepak Katragadda <dkatraga@codeaurora.org>
parent ab2cc234

Documentation/devicetree/bindings/arm/msm/qcom,osm.txt

+26 −4
Original line number Diff line number Diff line
@@ -21,10 +21,27 @@ Properties: 
	Usage:      required

	Value type: <stringlist>

	Definition: Address names. Must be "osm_l3_base", "osm_pwrcl_base",

		    "osm_perfcl_base".

		    "osm_perfcl_base", and "cpr_rc".

		    Must be specified in the same order as the corresponding

		    addresses are specified in the reg property.



- vdd_l3_mx_ao-supply

	Usage:      required

	Value type: <phandle>

	Definition: Phandle to the MX active-only regulator device.



- vdd_pwrcl_mx_ao-supply

	Usage:      required

	Value type: <phandle>

	Definition: Phandle to the MX active-only regulator device.



- qcom,mx-turbo-freq

	Usage:      required

	Value type: <array>

	Definition: List of frequencies for the 3 clock domains (following the

		    order of L3, power, and performance clusters) that denote

		    the lowest rate that requires a TURBO vote on the MX rail.



- l3-devs

	Usage: optional

	Value type: <phandle>
@@ -46,10 +63,15 @@ Example: 
		compatible = "qcom,clk-cpu-osm";

		reg = <0x17d41000 0x1400>,

			<0x17d43000 0x1400>,

			<0x17d45800 0x1400>;

		reg-names = "osm_l3_base", "osm_pwrcl_base", "osm_perfcl_base";

			<0x17d45800 0x1400>,

			<0x784248 0x4>;

		reg-names = "osm_l3_base", "osm_pwrcl_base", "osm_perfcl_base",

							"cpr_rc";

		vdd_l3_mx_ao-supply = <&pm8998_s6_level_ao>;

		vdd_pwrcl_mx_ao-supply = <&pm8998_s6_level_ao>;



		l3-devs = <&phandle0 &phandle1 &phandle2>;

		qcom,mx-turbo-freq = <1478400000 1689600000 3300000001>;

		l3-devs = <&l3_cpu0 &l3_cpu4 &l3_cdsp>;



		clock-names = "xo_ao";

		clocks = <&clock_rpmh RPMH_CXO_CLK_A>;

arch/arm64/boot/dts/qcom/sdm670.dtsi

+8 −3
Original line number Diff line number Diff line
@@ -1034,9 +1034,14 @@ 
		compatible = "qcom,clk-cpu-osm-sdm670";

		reg = <0x17d41000 0x1400>,

			<0x17d43000 0x1400>,

			<0x17d45800 0x1400>;

		reg-names = "osm_l3_base", "osm_pwrcl_base", "osm_perfcl_base";



			<0x17d45800 0x1400>,

			<0x784248 0x4>;

		reg-names = "osm_l3_base", "osm_pwrcl_base", "osm_perfcl_base",

				"cpr_rc";

		vdd_l3_mx_ao-supply = <&pm660l_s1_level_ao>;

		vdd_pwrcl_mx_ao-supply = <&pm660l_s1_level_ao>;



		qcom,mx-turbo-freq = <1478400000 1689600000 3300000001>;

		l3-devs = <&l3_cpu0 &l3_cpu6>;



		clock-names = "xo_ao";

arch/arm64/boot/dts/qcom/sdm845-interposer-pm660.dtsi

+5 −0
Original line number Diff line number Diff line
@@ -236,6 +236,11 @@ 
	/delete-property/ vdd_gfx-supply;

};



&clock_cpucc {

	/delete-property/ vdd_l3_mx_ao-supply;

	/delete-property/ vdd_pwrcl_mx_ao-supply;

};



&pil_modem {

	/delete-property/ vdd_cx-supply;

	/delete-property/ vdd_mx-supply;

arch/arm64/boot/dts/qcom/sdm845-v2.dtsi

+6 −0
Original line number Diff line number Diff line
@@ -81,6 +81,12 @@ 


&clock_cpucc {

	compatible = "qcom,clk-cpu-osm-v2";

	reg = <0x17d41000 0x1400>,

		<0x17d43000 0x1400>,

		<0x17d45800 0x1400>,

		<0x78425c 0x4>;

	reg-names = "osm_l3_base", "osm_pwrcl_base", "osm_perfcl_base",

							"cpr_rc";

};



&pcie1 {

arch/arm64/boot/dts/qcom/sdm845.dtsi

+8 −3
Original line number Diff line number Diff line
@@ -1229,9 +1229,14 @@ 
		compatible = "qcom,clk-cpu-osm";

		reg = <0x17d41000 0x1400>,

			<0x17d43000 0x1400>,

			<0x17d45800 0x1400>;

		reg-names = "osm_l3_base", "osm_pwrcl_base", "osm_perfcl_base";



			<0x17d45800 0x1400>,

			<0x784248 0x4>;

		reg-names = "osm_l3_base", "osm_pwrcl_base", "osm_perfcl_base",

							"cpr_rc";

		vdd_l3_mx_ao-supply = <&pm8998_s6_level_ao>;

		vdd_pwrcl_mx_ao-supply = <&pm8998_s6_level_ao>;



		qcom,mx-turbo-freq = <1478400000 1689600000 3300000001>;

		l3-devs = <&l3_cpu0 &l3_cpu4 &l3_cdsp>;



		clock-names = "xo_ao";