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Commit 01e3478a authored by Hemant Kumar's avatar Hemant Kumar
Browse files

ARM: dts: msm: Add bus bandwidth vectors for USB on sdxpoorwills 



This change adds different bus bandwidth vectors with USB port to
receive better latency and throughput while accessing bus. It also
adds IPA slave config to access IPA related doorbell register for
hardware accelerated usecase with primary USB port. It also adds
bus voting to keep PCNOC bus clock running at 10Mhz for case where
APSS is trying to access USB3 registers.

Change-Id: I7fedc4a419324126a849509176b7b5bdd634924a
Signed-off-by: default avatarHemant Kumar <hemantk@codeaurora.org>
parent d5d55ba0

arch/arm/boot/dts/qcom/sdxpoorwills-usb.dtsi

+14 −0
Original line number Diff line number Diff line
@@ -12,6 +12,7 @@ 
 */

#include <dt-bindings/clock/qcom,rpmh.h>

#include <dt-bindings/clock/qcom,gcc-sdxpoorwills.h>

#include <dt-bindings/msm/msm-bus-ids.h>



&soc {

	/* USB port for DWC3 controller */
@@ -47,6 +48,19 @@ 
		resets = <&clock_gcc GCC_USB30_BCR>;

		reset-names = "core_reset";



		qcom,msm-bus,name = "usb";

		qcom,msm-bus,num-cases = <2>;

		qcom,msm-bus,num-paths = <3>;

		qcom,msm-bus,vectors-KBps =

			<MSM_BUS_MASTER_USB3 MSM_BUS_SLAVE_EBI_CH0 0 0>,

			<MSM_BUS_MASTER_USB3 MSM_BUS_SLAVE_IPA_CFG 0 0>,

			<MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_USB3 0 0>,

			<MSM_BUS_MASTER_USB3

				MSM_BUS_SLAVE_EBI_CH0 240000 700000>,

			<MSM_BUS_MASTER_USB3

				MSM_BUS_SLAVE_IPA_CFG 0 2400>,

			<MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_USB3 0 40000>;



		dwc3@a600000 {

			compatible = "snps,dwc3";

			reg = <0x0a600000 0xcd00>;