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Commit 013d3752 authored by Ville Syrjälä's avatar Ville Syrjälä
Browse files

drm/i915: Introduce bdw_{update,enable,disable}_pipe_irq() 



Pull the BDW+ DE pipe interrupt mask frobbing into a central place,
like we have for other platforms.

v2: Fix the kerneldoc (Daniel)

Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1448294777-13722-4-git-send-email-ville.syrjala@linux.intel.com


Reviewed-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent fbdedaea

drivers/gpu/drm/i915/i915_drv.h

+14 −0
Original line number Diff line number Diff line
@@ -2764,6 +2764,20 @@ ilk_disable_display_irq(struct drm_i915_private *dev_priv, uint32_t bits) 
{

	ilk_update_display_irq(dev_priv, bits, 0);

}

void bdw_update_pipe_irq(struct drm_i915_private *dev_priv,

			 enum pipe pipe,

			 uint32_t interrupt_mask,

			 uint32_t enabled_irq_mask);

static inline void bdw_enable_pipe_irq(struct drm_i915_private *dev_priv,

				       enum pipe pipe, uint32_t bits)

{

	bdw_update_pipe_irq(dev_priv, pipe, bits, bits);

}

static inline void bdw_disable_pipe_irq(struct drm_i915_private *dev_priv,

					enum pipe pipe, uint32_t bits)

{

	bdw_update_pipe_irq(dev_priv, pipe, bits, 0);

}

void ibx_display_interrupt_update(struct drm_i915_private *dev_priv,

				  uint32_t interrupt_mask,

				  uint32_t enabled_irq_mask);

drivers/gpu/drm/i915/i915_irq.c

+35 −6
Original line number Diff line number Diff line
@@ -437,6 +437,38 @@ static void bdw_update_port_irq(struct drm_i915_private *dev_priv, 
	}

}



/**

 * bdw_update_pipe_irq - update DE pipe interrupt

 * @dev_priv: driver private

 * @pipe: pipe whose interrupt to update

 * @interrupt_mask: mask of interrupt bits to update

 * @enabled_irq_mask: mask of interrupt bits to enable

 */

void bdw_update_pipe_irq(struct drm_i915_private *dev_priv,

			 enum pipe pipe,

			 uint32_t interrupt_mask,

			 uint32_t enabled_irq_mask)

{

	uint32_t new_val;



	assert_spin_locked(&dev_priv->irq_lock);



	WARN_ON(enabled_irq_mask & ~interrupt_mask);



	if (WARN_ON(!intel_irqs_enabled(dev_priv)))

		return;



	new_val = dev_priv->de_irq_mask[pipe];

	new_val &= ~interrupt_mask;

	new_val |= (~enabled_irq_mask & interrupt_mask);



	if (new_val != dev_priv->de_irq_mask[pipe]) {

		dev_priv->de_irq_mask[pipe] = new_val;

		I915_WRITE(GEN8_DE_PIPE_IMR(pipe), dev_priv->de_irq_mask[pipe]);

		POSTING_READ(GEN8_DE_PIPE_IMR(pipe));

	}

}



/**

 * ibx_display_interrupt_update - update SDEIMR

 * @dev_priv: driver private
@@ -2668,10 +2700,9 @@ static int gen8_enable_vblank(struct drm_device *dev, unsigned int pipe) 
	unsigned long irqflags;



	spin_lock_irqsave(&dev_priv->irq_lock, irqflags);

	dev_priv->de_irq_mask[pipe] &= ~GEN8_PIPE_VBLANK;

	I915_WRITE(GEN8_DE_PIPE_IMR(pipe), dev_priv->de_irq_mask[pipe]);

	POSTING_READ(GEN8_DE_PIPE_IMR(pipe));

	bdw_enable_pipe_irq(dev_priv, pipe, GEN8_PIPE_VBLANK);

	spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);



	return 0;

}
@@ -2719,9 +2750,7 @@ static void gen8_disable_vblank(struct drm_device *dev, unsigned int pipe) 
	unsigned long irqflags;



	spin_lock_irqsave(&dev_priv->irq_lock, irqflags);

	dev_priv->de_irq_mask[pipe] |= GEN8_PIPE_VBLANK;

	I915_WRITE(GEN8_DE_PIPE_IMR(pipe), dev_priv->de_irq_mask[pipe]);

	POSTING_READ(GEN8_DE_PIPE_IMR(pipe));

	bdw_disable_pipe_irq(dev_priv, pipe, GEN8_PIPE_VBLANK);

	spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);

}

drivers/gpu/drm/i915/intel_fifo_underrun.c

+2 −6
Original line number Diff line number Diff line
@@ -178,14 +178,10 @@ static void broadwell_set_fifo_underrun_reporting(struct drm_device *dev, 
{

	struct drm_i915_private *dev_priv = dev->dev_private;



	assert_spin_locked(&dev_priv->irq_lock);



	if (enable)

		dev_priv->de_irq_mask[pipe] &= ~GEN8_PIPE_FIFO_UNDERRUN;

		bdw_enable_pipe_irq(dev_priv, pipe, GEN8_PIPE_FIFO_UNDERRUN);

	else

		dev_priv->de_irq_mask[pipe] |= GEN8_PIPE_FIFO_UNDERRUN;

	I915_WRITE(GEN8_DE_PIPE_IMR(pipe), dev_priv->de_irq_mask[pipe]);

	POSTING_READ(GEN8_DE_PIPE_IMR(pipe));

		bdw_disable_pipe_irq(dev_priv, pipe, GEN8_PIPE_FIFO_UNDERRUN);

}



static void ibx_set_fifo_underrun_reporting(struct drm_device *dev,