Merge "msm: kgsl: Create GPU device node based on gfx fuse"

				mask   - mask for the relevant bits in the efuse register.

				shift  - number of bits to right shift to get the speed bin

				value.

- qcom,gpu-disable-fuse:	GPU disable fuse

				<offset mask shift>

				offset - offset of the efuse register from the base.

				mask   - mask for the relevant bits in the efuse register.

				shift  - number of bits to right shift to get the disable_gpu

				fuse bit value.

- qcom,highest-bank-bit:

				Specify the bit of the highest DDR bank. This

				is programmed into protected registers and also

/* Copyright (c) 2002,2007-2017, The Linux Foundation. All rights reserved.

/* Copyright (c) 2002,2007-2018, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and

		KGSL_DRV_WARN(device, "cx_dbgc ioremap failed\n");

}

static bool adreno_is_gpu_disabled(struct adreno_device *adreno_dev)

{

	unsigned int row0;

	unsigned int pte_row0_msb[3];

	int ret;

	struct kgsl_device *device = KGSL_DEVICE(adreno_dev);

	if (of_property_read_u32_array(device->pdev->dev.of_node,

		"qcom,gpu-disable-fuse", pte_row0_msb, 3))

		return false;

	/*

	 * Read the fuse value to disable GPU driver if fuse

	 * is blown. By default(fuse value is 0) GPU is enabled.

	 */

	if (adreno_efuse_map(adreno_dev))

		return false;

	ret = adreno_efuse_read_u32(adreno_dev, pte_row0_msb[0], &row0);

	adreno_efuse_unmap(adreno_dev);

	if (ret)

		return false;

	return (row0 >> pte_row0_msb[2]) &

			pte_row0_msb[1] ? true : false;

}

static int adreno_probe(struct platform_device *pdev)

{

	struct kgsl_device *device;

	device = KGSL_DEVICE(adreno_dev);

	device->pdev = pdev;

	if (adreno_is_gpu_disabled(adreno_dev)) {

		pr_err("adreno: GPU is disabled on this device");

		return -ENODEV;

	}

	/* Get the chip ID from the DT and set up target specific parameters */

	adreno_identify_gpu(adreno_dev);