Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 004417a6 authored by Peter Zijlstra's avatar Peter Zijlstra Committed by Ingo Molnar
Browse files

perf, arch: Cleanup perf-pmu init vs lockup-detector



The perf hardware pmu got initialized at various points in the boot,
some before early_initcall() some after (notably arch_initcall).

The problem is that the NMI lockup detector is ran from early_initcall()
and expects the hardware pmu to be present.

Sanitize this by moving all architecture hardware pmu implementations to
initialize at early_initcall() and move the lockup detector to an explicit
initcall right after that.

Cc: paulus <paulus@samba.org>
Cc: davem <davem@davemloft.net>
Cc: Michael Cree <mcree@orcon.net.nz>
Cc: Deng-Cheng Zhu <dengcheng.zhu@gmail.com>
Acked-by: default avatarPaul Mundt <lethal@linux-sh.org>
Acked-by: default avatarWill Deacon <will.deacon@arm.com>
Signed-off-by: default avatarPeter Zijlstra <a.p.zijlstra@chello.nl>
LKML-Reference: <1290707759.2145.119.camel@laptop>
Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
parent 5ef428c4
Loading
Loading
Loading
Loading
+0 −6
Original line number Diff line number Diff line
#ifndef __ASM_ALPHA_PERF_EVENT_H
#define __ASM_ALPHA_PERF_EVENT_H

#ifdef CONFIG_PERF_EVENTS
extern void init_hw_perf_events(void);
#else
static inline void init_hw_perf_events(void)    { }
#endif

#endif /* __ASM_ALPHA_PERF_EVENT_H */
+0 −2
Original line number Diff line number Diff line
@@ -112,8 +112,6 @@ init_IRQ(void)
	wrent(entInt, 0);

	alpha_mv.init_irq();

	init_hw_perf_events();
}

/*
+6 −3
Original line number Diff line number Diff line
@@ -14,6 +14,7 @@
#include <linux/kernel.h>
#include <linux/kdebug.h>
#include <linux/mutex.h>
#include <linux/init.h>

#include <asm/hwrpb.h>
#include <asm/atomic.h>
@@ -863,13 +864,13 @@ static void alpha_perf_event_irq_handler(unsigned long la_ptr,
/*
 * Init call to initialise performance events at kernel startup.
 */
void __init init_hw_perf_events(void)
int __init init_hw_perf_events(void)
{
	pr_info("Performance events: ");

	if (!supported_cpu()) {
		pr_cont("No support for your CPU.\n");
		return;
		return 0;
	}

	pr_cont("Supported CPU type!\n");
@@ -882,5 +883,7 @@ void __init init_hw_perf_events(void)
	alpha_pmu = &ev67_pmu;

	perf_pmu_register(&pmu);
}

	return 0;
}
early_initcall(init_hw_perf_events);
+1 −1
Original line number Diff line number Diff line
@@ -3038,7 +3038,7 @@ init_hw_perf_events(void)

	return 0;
}
arch_initcall(init_hw_perf_events);
early_initcall(init_hw_perf_events);

/*
 * Callchain handling code.
+1 −1
Original line number Diff line number Diff line
@@ -1047,6 +1047,6 @@ init_hw_perf_events(void)

	return 0;
}
arch_initcall(init_hw_perf_events);
early_initcall(init_hw_perf_events);

#endif /* defined(CONFIG_CPU_MIPS32)... */
Loading