Loading drivers/mmc/host/sdhci-msm.c +35 −6 Original line number Diff line number Diff line Loading @@ -3018,11 +3018,20 @@ static int sdhci_msm_enable_controller_clock(struct sdhci_host *host) } } if (!IS_ERR(msm_host->bus_aggr_clk)) { rc = clk_prepare_enable(msm_host->bus_aggr_clk); if (rc) { pr_err("%s: %s: failed to enable the bus aggr clk with error %d\n", mmc_hostname(host->mmc), __func__, rc); goto disable_pclk; } } rc = clk_prepare_enable(msm_host->clk); if (rc) { pr_err("%s: %s: failed to enable the host-clk with error %d\n", mmc_hostname(host->mmc), __func__, rc); goto disable_pclk; goto disable_bus_aggr_clk; } if (!IS_ERR(msm_host->ice_clk)) { Loading @@ -3042,6 +3051,9 @@ static int sdhci_msm_enable_controller_clock(struct sdhci_host *host) disable_host_clk: if (!IS_ERR(msm_host->clk)) clk_disable_unprepare(msm_host->clk); disable_bus_aggr_clk: if (!IS_ERR(msm_host->bus_aggr_clk)) clk_disable_unprepare(msm_host->bus_aggr_clk); disable_pclk: if (!IS_ERR(msm_host->pclk)) clk_disable_unprepare(msm_host->pclk); Loading @@ -3063,6 +3075,8 @@ static void sdhci_msm_disable_controller_clock(struct sdhci_host *host) clk_disable_unprepare(msm_host->clk); if (!IS_ERR(msm_host->ice_clk)) clk_disable_unprepare(msm_host->ice_clk); if (!IS_ERR(msm_host->bus_aggr_clk)) clk_disable_unprepare(msm_host->bus_aggr_clk); if (!IS_ERR(msm_host->pclk)) clk_disable_unprepare(msm_host->pclk); sdhci_msm_bus_voting(host, 0); Loading Loading @@ -3154,6 +3168,8 @@ static int sdhci_msm_prepare_clocks(struct sdhci_host *host, bool enable) clk_disable_unprepare(msm_host->clk); if (!IS_ERR(msm_host->ice_clk)) clk_disable_unprepare(msm_host->ice_clk); if (!IS_ERR_OR_NULL(msm_host->bus_aggr_clk)) clk_disable_unprepare(msm_host->bus_aggr_clk); if (!IS_ERR_OR_NULL(msm_host->pclk)) clk_disable_unprepare(msm_host->pclk); atomic_set(&msm_host->controller_clock, 0); Loading Loading @@ -4473,6 +4489,16 @@ static int sdhci_msm_probe(struct platform_device *pdev) } atomic_set(&msm_host->controller_clock, 1); /* Setup SDC ufs bus aggr clock */ msm_host->bus_aggr_clk = devm_clk_get(&pdev->dev, "bus_aggr_clk"); if (!IS_ERR(msm_host->bus_aggr_clk)) { ret = clk_prepare_enable(msm_host->bus_aggr_clk); if (ret) { dev_err(&pdev->dev, "Bus aggregate clk not enabled\n"); goto pclk_disable; } } if (msm_host->ice.pdev) { /* Setup SDC ICE clock */ msm_host->ice_clk = devm_clk_get(&pdev->dev, "ice_core_clk"); Loading @@ -4484,11 +4510,11 @@ static int sdhci_msm_probe(struct platform_device *pdev) dev_err(&pdev->dev, "ICE_CLK rate set failed (%d) for %u\n", ret, msm_host->pdata->ice_clk_max); goto pclk_disable; goto bus_aggr_clk_disable; } ret = clk_prepare_enable(msm_host->ice_clk); if (ret) goto pclk_disable; goto bus_aggr_clk_disable; msm_host->ice_clk_rate = msm_host->pdata->ice_clk_max; Loading @@ -4499,18 +4525,18 @@ static int sdhci_msm_probe(struct platform_device *pdev) msm_host->clk = devm_clk_get(&pdev->dev, "core_clk"); if (IS_ERR(msm_host->clk)) { ret = PTR_ERR(msm_host->clk); goto pclk_disable; goto bus_aggr_clk_disable; } /* Set to the minimum supported clock frequency */ ret = clk_set_rate(msm_host->clk, sdhci_msm_get_min_clock(host)); if (ret) { dev_err(&pdev->dev, "MClk rate set failed (%d)\n", ret); goto pclk_disable; goto bus_aggr_clk_disable; } ret = clk_prepare_enable(msm_host->clk); if (ret) goto pclk_disable; goto bus_aggr_clk_disable; msm_host->clk_rate = sdhci_msm_get_min_clock(host); atomic_set(&msm_host->clks_on, 1); Loading Loading @@ -4875,6 +4901,9 @@ static int sdhci_msm_probe(struct platform_device *pdev) clk_disable: if (!IS_ERR(msm_host->clk)) clk_disable_unprepare(msm_host->clk); bus_aggr_clk_disable: if (!IS_ERR(msm_host->bus_aggr_clk)) clk_disable_unprepare(msm_host->bus_aggr_clk); pclk_disable: if (!IS_ERR(msm_host->pclk)) clk_disable_unprepare(msm_host->pclk); Loading drivers/mmc/host/sdhci-msm.h +1 −0 Original line number Diff line number Diff line Loading @@ -203,6 +203,7 @@ struct sdhci_msm_host { int pwr_irq; /* power irq */ struct clk *clk; /* main SD/MMC bus clock */ struct clk *pclk; /* SDHC peripheral bus clock */ struct clk *bus_aggr_clk; /* Axi clock shared with UFS */ struct clk *bus_clk; /* SDHC bus voter clock */ struct clk *ff_clk; /* CDC calibration fixed feedback clock */ struct clk *sleep_clk; /* CDC calibration sleep clock */ Loading Loading
drivers/mmc/host/sdhci-msm.c +35 −6 Original line number Diff line number Diff line Loading @@ -3018,11 +3018,20 @@ static int sdhci_msm_enable_controller_clock(struct sdhci_host *host) } } if (!IS_ERR(msm_host->bus_aggr_clk)) { rc = clk_prepare_enable(msm_host->bus_aggr_clk); if (rc) { pr_err("%s: %s: failed to enable the bus aggr clk with error %d\n", mmc_hostname(host->mmc), __func__, rc); goto disable_pclk; } } rc = clk_prepare_enable(msm_host->clk); if (rc) { pr_err("%s: %s: failed to enable the host-clk with error %d\n", mmc_hostname(host->mmc), __func__, rc); goto disable_pclk; goto disable_bus_aggr_clk; } if (!IS_ERR(msm_host->ice_clk)) { Loading @@ -3042,6 +3051,9 @@ static int sdhci_msm_enable_controller_clock(struct sdhci_host *host) disable_host_clk: if (!IS_ERR(msm_host->clk)) clk_disable_unprepare(msm_host->clk); disable_bus_aggr_clk: if (!IS_ERR(msm_host->bus_aggr_clk)) clk_disable_unprepare(msm_host->bus_aggr_clk); disable_pclk: if (!IS_ERR(msm_host->pclk)) clk_disable_unprepare(msm_host->pclk); Loading @@ -3063,6 +3075,8 @@ static void sdhci_msm_disable_controller_clock(struct sdhci_host *host) clk_disable_unprepare(msm_host->clk); if (!IS_ERR(msm_host->ice_clk)) clk_disable_unprepare(msm_host->ice_clk); if (!IS_ERR(msm_host->bus_aggr_clk)) clk_disable_unprepare(msm_host->bus_aggr_clk); if (!IS_ERR(msm_host->pclk)) clk_disable_unprepare(msm_host->pclk); sdhci_msm_bus_voting(host, 0); Loading Loading @@ -3154,6 +3168,8 @@ static int sdhci_msm_prepare_clocks(struct sdhci_host *host, bool enable) clk_disable_unprepare(msm_host->clk); if (!IS_ERR(msm_host->ice_clk)) clk_disable_unprepare(msm_host->ice_clk); if (!IS_ERR_OR_NULL(msm_host->bus_aggr_clk)) clk_disable_unprepare(msm_host->bus_aggr_clk); if (!IS_ERR_OR_NULL(msm_host->pclk)) clk_disable_unprepare(msm_host->pclk); atomic_set(&msm_host->controller_clock, 0); Loading Loading @@ -4473,6 +4489,16 @@ static int sdhci_msm_probe(struct platform_device *pdev) } atomic_set(&msm_host->controller_clock, 1); /* Setup SDC ufs bus aggr clock */ msm_host->bus_aggr_clk = devm_clk_get(&pdev->dev, "bus_aggr_clk"); if (!IS_ERR(msm_host->bus_aggr_clk)) { ret = clk_prepare_enable(msm_host->bus_aggr_clk); if (ret) { dev_err(&pdev->dev, "Bus aggregate clk not enabled\n"); goto pclk_disable; } } if (msm_host->ice.pdev) { /* Setup SDC ICE clock */ msm_host->ice_clk = devm_clk_get(&pdev->dev, "ice_core_clk"); Loading @@ -4484,11 +4510,11 @@ static int sdhci_msm_probe(struct platform_device *pdev) dev_err(&pdev->dev, "ICE_CLK rate set failed (%d) for %u\n", ret, msm_host->pdata->ice_clk_max); goto pclk_disable; goto bus_aggr_clk_disable; } ret = clk_prepare_enable(msm_host->ice_clk); if (ret) goto pclk_disable; goto bus_aggr_clk_disable; msm_host->ice_clk_rate = msm_host->pdata->ice_clk_max; Loading @@ -4499,18 +4525,18 @@ static int sdhci_msm_probe(struct platform_device *pdev) msm_host->clk = devm_clk_get(&pdev->dev, "core_clk"); if (IS_ERR(msm_host->clk)) { ret = PTR_ERR(msm_host->clk); goto pclk_disable; goto bus_aggr_clk_disable; } /* Set to the minimum supported clock frequency */ ret = clk_set_rate(msm_host->clk, sdhci_msm_get_min_clock(host)); if (ret) { dev_err(&pdev->dev, "MClk rate set failed (%d)\n", ret); goto pclk_disable; goto bus_aggr_clk_disable; } ret = clk_prepare_enable(msm_host->clk); if (ret) goto pclk_disable; goto bus_aggr_clk_disable; msm_host->clk_rate = sdhci_msm_get_min_clock(host); atomic_set(&msm_host->clks_on, 1); Loading Loading @@ -4875,6 +4901,9 @@ static int sdhci_msm_probe(struct platform_device *pdev) clk_disable: if (!IS_ERR(msm_host->clk)) clk_disable_unprepare(msm_host->clk); bus_aggr_clk_disable: if (!IS_ERR(msm_host->bus_aggr_clk)) clk_disable_unprepare(msm_host->bus_aggr_clk); pclk_disable: if (!IS_ERR(msm_host->pclk)) clk_disable_unprepare(msm_host->pclk); Loading
drivers/mmc/host/sdhci-msm.h +1 −0 Original line number Diff line number Diff line Loading @@ -203,6 +203,7 @@ struct sdhci_msm_host { int pwr_irq; /* power irq */ struct clk *clk; /* main SD/MMC bus clock */ struct clk *pclk; /* SDHC peripheral bus clock */ struct clk *bus_aggr_clk; /* Axi clock shared with UFS */ struct clk *bus_clk; /* SDHC bus voter clock */ struct clk *ff_clk; /* CDC calibration fixed feedback clock */ struct clk *sleep_clk; /* CDC calibration sleep clock */ Loading